patch-2.3.13 linux/arch/arm/kernel/entry-armv.S

• Lines: 42
• Date: Mon Aug 2 10:19:52 1999
• Orig file: v2.3.12/linux/arch/arm/kernel/entry-armv.S
• Orig date: Wed Jul 21 15:46:48 1999

diff -u --recursive --new-file v2.3.12/linux/arch/arm/kernel/entry-armv.S linux/arch/arm/kernel/entry-armv.S
@@ -455,7 +455,7 @@
 		mov	r0, r2
 		ldr	r2, .LCprocfns
 		mov	lr, pc
-		ldr	pc, [r2, #8]			@ call processor specific code
+		ldr	pc, [r2, #4]			@ call processor specific code
 		mov	r3, sp
 		bl	SYMBOL_NAME(do_DataAbort)
 		ldr	r0, [sp, #S_PSR]
@@ -542,7 +542,7 @@
 		msr	cpsr, r2
 		ldr	r2, .LCprocfns
 		mov	lr, pc
-		ldr	pc, [r2, #8]			@ call processor specific code
+		ldr	pc, [r2, #4]			@ call processor specific code
 		mov	r3, sp
 		adrsvc	al, lr, ret_from_sys_call
 		b	SYMBOL_NAME(do_DataAbort)
@@ -654,6 +654,23 @@
 		add	sp, sp, #S_FRAME_SIZE
 		movs	pc, lr
 #endif
+
+/*
+ * Register switch for ARMv3 and ARMv4 processors
+ * r0 = previous, r1 = next, return previous.
+ * previous and next are guaranteed not to be the same.
+ */
+ENTRY(__switch_to)
+		stmfd	sp!, {r4 - r9, fp, lr}		@ Store most regs on stack
+		mrs	ip, cpsr
+		stmfd	sp!, {ip}			@ Save cpsr_SVC
+		ldr	r2, [r1, #TSS_DOMAIN]
+		str	sp, [r0, #TSS_SAVE]		@ Save sp_SVC
+		ldr	sp, [r1, #TSS_SAVE]		@ Get saved sp_SVC
+		mcr	p15, 0, r2, c3, c0		@ Set domain register
+		ldmfd	sp!, {ip}
+		msr	spsr, ip			@ Save tasks CPSR into SPSR for this return
+		ldmfd	sp!, {r4 - r9, fp, pc}^		@ Load all regs saved previously
 
 		.section ".text.init",#alloc,#execinstr
 /*