patch-2.3.14 linux/include/linux/pci.h

• Lines: 96
• Date: Wed Aug 18 16:43:30 1999
• Orig file: v2.3.13/linux/include/linux/pci.h
• Orig date: Mon Aug 9 14:59:23 1999

diff -u --recursive --new-file v2.3.13/linux/include/linux/pci.h linux/include/linux/pci.h
@@ -1208,11 +1208,41 @@
 #include <linux/config.h>
 #include <linux/ioport.h>
 
+#define DEVICE_COUNT_COMPATIBLE	4
+#define DEVICE_COUNT_DMA	2
+#define DEVICE_COUNT_RESOURCE	12
+
+#define DEVICE_IRQ_NOTSET	0xffffffff
+#define DEVICE_IRQ_AUTO		0xfffffffe
+#define DEVICE_DMA_NOTSET	0xff
+#define DEVICE_DMA_AUTO		0xfe
+
+#define DEVICE_IRQ_FLAG_HIGHEDGE	(1<<0)
+#define DEVICE_IRQ_FLAG_LOWEDGE		(1<<1)
+#define DEVICE_IRQ_FLAG_HIGHLEVEL	(1<<2)
+#define DEVICE_IRQ_FLAG_LOWLEVEL	(1<<3)
+
+#define DEVICE_DMA_TYPE_8BIT		0
+#define DEVICE_DMA_TYPE_8AND16BIT	1
+#define DEVICE_DMA_TYPE_16BIT		2
+
+#define DEVICE_DMA_FLAG_MASTER		(1<<0)
+#define DEVICE_DMA_FLAG_BYTE		(1<<1)
+#define DEVICE_DMA_FLAG_WORD		(1<<2)
+
+#define DEVICE_DMA_SPEED_COMPATIBLE	0
+#define DEVICE_DMA_SPEED_TYPEA		1
+#define DEVICE_DMA_SPEED_TYPEB		2
+#define DEVICE_DMA_SPEED_TYPEF		3
+
 /*
  * There is one pci_dev structure for each slot-number/function-number
  * combination:
  */
 struct pci_dev {
+	int active;			/* device is active */
+	int ro;				/* Read/Only */
+
 	struct pci_bus	*bus;		/* bus this device is on */
 	struct pci_dev	*sibling;	/* next device on this bus */
 	struct pci_dev	*next;		/* chain of all devices */
@@ -1227,6 +1257,12 @@
 	unsigned int	hdr_type;	/* PCI header type */
 	unsigned int	master : 1;	/* set if device is master capable */
 
+	unsigned short	regs;
+	
+	/* device is compatible with these IDs */
+	unsigned short vendor_compatible[DEVICE_COUNT_COMPATIBLE];
+	unsigned short device_compatible[DEVICE_COUNT_COMPATIBLE];
+
 	char		name[48];
 
 	/*
@@ -1241,12 +1277,23 @@
 	 * cannot generate interrupts at all.
 	 */
 	unsigned int	irq;		/* irq generated by this device */
+	unsigned short	irq_flags;	/* irq type */
+	unsigned int	irq2;
+	unsigned short	irq2_flags;	
+	unsigned char	dma[DEVICE_COUNT_DMA];
+	unsigned char	dma_type[DEVICE_COUNT_DMA];
+	unsigned char	dma_flags[DEVICE_COUNT_DMA];
+	unsigned char	dma_speed[DEVICE_COUNT_DMA];
 
 	/* Base registers for this device, can be adjusted by
 	 * pcibios_fixup() as necessary.
 	 */
-	struct resource resource[6];
+	struct resource resource[DEVICE_COUNT_RESOURCE];
 	unsigned long	rom_address;
+
+	int (*prepare)(struct pci_dev *dev);
+	int (*activate)(struct pci_dev *dev);
+	int (*deactivate)(struct pci_dev *dev);
 };
 
 struct pci_bus {
@@ -1264,6 +1311,15 @@
 	unsigned char	primary;	/* number of primary bridge */
 	unsigned char	secondary;	/* number of secondary bridge */
 	unsigned char	subordinate;	/* max number of subordinate buses */
+
+	char		name[48];
+	unsigned short	vendor;
+	unsigned short	device;
+	unsigned int	serial;		/* serial number */
+	unsigned char	pnpver;		/* Plug & Play version */
+	unsigned char	productver;	/* product version */
+	unsigned char	checksum;	/* if zero - checksum passed */
+	unsigned char	pad1;
 };
 
 extern struct pci_bus	pci_root;	/* root bus */