patch-2.4.10 linux/arch/mips/mm/andes.c

• Lines: 25
• Date: Sun Sep 9 10:43:02 2001
• Orig file: v2.4.9/linux/arch/mips/mm/andes.c
• Orig date: Wed Jul 25 17:10:18 2001

diff -u --recursive --new-file v2.4.9/linux/arch/mips/mm/andes.c linux/arch/mips/mm/andes.c
@@ -132,7 +132,8 @@
 
 static void andes_flush_cache_sigtramp(unsigned long page)
 {
-	/* XXX */
+	protected_writeback_dcache_line(addr & ~(dc_lsize - 1));
+	protected_flush_icache_line(addr & ~(ic_lsize - 1));
 }
 
 /* TLB operations. XXX Write these dave... */
@@ -182,6 +183,14 @@
 	_flush_icache_page = andes_flush_icache_page;
 	_flush_icache_range = andes_flush_icache_range;
 
+	write_32bit_cp0_register(CP0_FRAMEMASK, 0);
+
 	flush_cache_all();
 	flush_tlb_all();
+
+	/*
+	 * The R10k might even work for Linux/MIPS - but we're paranoid
+	 * and refuse to run until this is tested on real silicon
+	 */
+	panic("CPU too expensive - making holiday in the ANDES!");
 }