patch-2.4.10 linux/arch/sparc64/kernel/pci_sabre.c

• Lines: 30
• Date: Tue Aug 28 07:09:44 2001
• Orig file: v2.4.9/linux/arch/sparc64/kernel/pci_sabre.c
• Orig date: Mon Aug 27 12:41:40 2001

diff -u --recursive --new-file v2.4.9/linux/arch/sparc64/kernel/pci_sabre.c linux/arch/sparc64/kernel/pci_sabre.c
@@ -1,4 +1,4 @@
-/* $Id: pci_sabre.c,v 1.38 2001/08/12 13:18:23 davem Exp $
+/* $Id: pci_sabre.c,v 1.39 2001/08/24 19:36:58 kanoj Exp $
  * pci_sabre.c: Sabre specific PCI controller support.
  *
  * Copyright (C) 1997, 1998, 1999 David S. Miller (davem@caipfs.rutgers.edu)
@@ -19,6 +19,7 @@
 #include <asm/smp.h>
 
 #include "pci_impl.h"
+#include "iommu_common.h"
 
 /* All SABRE registers are 64-bits.  The following accessor
  * routines are how they are accessed.  The REG parameter
@@ -759,13 +760,13 @@
 			       p->index, i, tag, type_string,
 			       ((tag & SABRE_IOMMUTAG_WRITE) ? 1 : 0),
 			       ((tag & SABRE_IOMMUTAG_SIZE) ? 64 : 8),
-			       ((tag & SABRE_IOMMUTAG_VPN) << PAGE_SHIFT));
+			       ((tag & SABRE_IOMMUTAG_VPN) << IOMMU_PAGE_SHIFT));
 			printk("SABRE%d: IOMMU DATA(%d)[RAW(%016lx)valid(%d)used(%d)cache(%d)ppg(%016lx)\n",
 			       p->index, i, data,
 			       ((data & SABRE_IOMMUDATA_VALID) ? 1 : 0),
 			       ((data & SABRE_IOMMUDATA_USED) ? 1 : 0),
 			       ((data & SABRE_IOMMUDATA_CACHE) ? 1 : 0),
-			       ((data & SABRE_IOMMUDATA_PPN) << PAGE_SHIFT));
+			       ((data & SABRE_IOMMUDATA_PPN) << IOMMU_PAGE_SHIFT));
 		}
 	}
 	spin_unlock_irqrestore(&iommu->lock, flags);