patch-2.4.10 linux/drivers/acpi/hardware/hwregs.c

• Lines: 606
• Date: Sun Sep 23 09:42:32 2001
• Orig file: v2.4.9/linux/drivers/acpi/hardware/hwregs.c
• Orig date: Tue Jul 3 17:08:19 2001

diff -u --recursive --new-file v2.4.9/linux/drivers/acpi/hardware/hwregs.c linux/drivers/acpi/hardware/hwregs.c
@@ -3,7 +3,7 @@
  *
  * Module Name: hwregs - Read/write access functions for the various ACPI
  *                       control and status registers.
- *              $Revision: 97 $
+ *              $Revision: 109 $
  *
  ******************************************************************************/
 
@@ -34,12 +34,6 @@
 	 MODULE_NAME         ("hwregs")
 
 
-/* This matches the #defines in actypes.h. */
-
-NATIVE_CHAR                 *sleep_state_table[] = {"\\_S0_","\\_S1_","\\_S2_","\\_S3_",
-			  "\\_S4_","\\_S5_","\\_S4_b"};
-
-
 /*******************************************************************************
  *
  * FUNCTION:    Acpi_hw_get_bit_shift
@@ -55,13 +49,17 @@
 
 u32
 acpi_hw_get_bit_shift (
-	u32                     mask) {
+	u32                     mask)
+{
 	u32                     shift;
 
 
+	FUNCTION_TRACE ("Hw_get_bit_shift");
+
+
 	for (shift = 0; ((mask >> shift) & 1) == 0; shift++) { ; }
 
-	return (shift);
+	return_VALUE (shift);
 }
 
 
@@ -84,14 +82,23 @@
 	u16                     index;
 
 
+	FUNCTION_TRACE ("Hw_clear_acpi_status");
+
+
+	ACPI_DEBUG_PRINT ((ACPI_DB_IO, "About to write %04X to %04X\n",
+		ALL_FIXED_STS_BITS,
+		(u16) ACPI_GET_ADDRESS (acpi_gbl_FADT->Xpm1a_evt_blk.address)));
+
+
 	acpi_ut_acquire_mutex (ACPI_MTX_HARDWARE);
 
 	acpi_hw_register_write (ACPI_MTX_DO_NOT_LOCK, PM1_STS, ALL_FIXED_STS_BITS);
 
 
 	if (ACPI_VALID_ADDRESS (acpi_gbl_FADT->Xpm1b_evt_blk.address)) {
-		acpi_os_out16 ((ACPI_IO_ADDRESS) ACPI_GET_ADDRESS (acpi_gbl_FADT->Xpm1b_evt_blk.address),
-			(u16) ALL_FIXED_STS_BITS);
+		acpi_os_write_port ((ACPI_IO_ADDRESS)
+			ACPI_GET_ADDRESS (acpi_gbl_FADT->Xpm1b_evt_blk.address),
+			ALL_FIXED_STS_BITS, 16);
 	}
 
 	/* now clear the GPE Bits */
@@ -100,9 +107,9 @@
 		gpe_length = (u16) DIV_2 (acpi_gbl_FADT->gpe0blk_len);
 
 		for (index = 0; index < gpe_length; index++) {
-			acpi_os_out8 ((ACPI_IO_ADDRESS) (
+			acpi_os_write_port ((ACPI_IO_ADDRESS) (
 				ACPI_GET_ADDRESS (acpi_gbl_FADT->Xgpe0blk.address) + index),
-				(u8) 0xff);
+					0xFF, 8);
 		}
 	}
 
@@ -110,14 +117,14 @@
 		gpe_length = (u16) DIV_2 (acpi_gbl_FADT->gpe1_blk_len);
 
 		for (index = 0; index < gpe_length; index++) {
-			acpi_os_out8 ((ACPI_IO_ADDRESS) (
+			acpi_os_write_port ((ACPI_IO_ADDRESS) (
 				ACPI_GET_ADDRESS (acpi_gbl_FADT->Xgpe1_blk.address) + index),
-				(u8) 0xff);
+				0xFF, 8);
 		}
 	}
 
 	acpi_ut_release_mutex (ACPI_MTX_HARDWARE);
-	return;
+	return_VOID;
 }
 
 
@@ -136,37 +143,39 @@
  *
  ******************************************************************************/
 
-ACPI_STATUS
+acpi_status
 acpi_hw_obtain_sleep_type_register_data (
 	u8                      sleep_state,
 	u8                      *slp_typ_a,
 	u8                      *slp_typ_b)
 {
-	ACPI_STATUS             status = AE_OK;
-	ACPI_OPERAND_OBJECT     *obj_desc;
+	acpi_status             status = AE_OK;
+	acpi_operand_object     *obj_desc;
+
+
+	FUNCTION_TRACE ("Hw_obtain_sleep_type_register_data");
 
 
 	/*
 	 *  Validate parameters
 	 */
-
 	if ((sleep_state > ACPI_S_STATES_MAX) ||
 		!slp_typ_a || !slp_typ_b) {
-		return (AE_BAD_PARAMETER);
+		return_ACPI_STATUS (AE_BAD_PARAMETER);
 	}
 
 	/*
 	 *  Acpi_evaluate the namespace object containing the values for this state
 	 */
-
-	status = acpi_ns_evaluate_by_name (sleep_state_table[sleep_state], NULL, &obj_desc);
+	status = acpi_ns_evaluate_by_name ((NATIVE_CHAR *) acpi_gbl_db_sleep_states[sleep_state],
+			  NULL, &obj_desc);
 	if (ACPI_FAILURE (status)) {
-		return (status);
+		return_ACPI_STATUS (status);
 	}
 
 	if (!obj_desc) {
 		REPORT_ERROR (("Missing Sleep State object\n"));
-		return (AE_NOT_EXIST);
+		return_ACPI_STATUS (AE_NOT_EXIST);
 	}
 
 	/*
@@ -207,10 +216,14 @@
 	}
 
 
+	if (ACPI_FAILURE (status)) {
+		ACPI_DEBUG_PRINT ((ACPI_DB_ERROR, "Bad Sleep object %p type %X\n",
+			obj_desc, obj_desc->common.type));
+	}
 
 	acpi_ut_remove_reference (obj_desc);
 
-	return (status);
+	return_ACPI_STATUS (status);
 }
 
 
@@ -244,6 +257,9 @@
 	va_list                 marker;
 
 
+	FUNCTION_TRACE ("Hw_register_bit_access");
+
+
 	if (read_write == ACPI_WRITE) {
 		va_start (marker, register_id);
 		value = va_arg (marker, u32);
@@ -261,7 +277,6 @@
 	 * Check bit id to fine locate Register offset.
 	 * Check Mask to determine Register offset, and then read-write.
 	 */
-
 	switch (REGISTER_BLOCK_ID (register_id)) {
 	case PM1_STS:
 
@@ -309,7 +324,6 @@
 			 * others should be written as 0 so they will be left
 			 * unchanged
 			 */
-
 			value <<= acpi_hw_get_bit_shift (mask);
 			value &= mask;
 
@@ -402,6 +416,8 @@
 		 */
 		register_value = acpi_hw_register_read (ACPI_MTX_DO_NOT_LOCK, PM1_CONTROL);
 
+		ACPI_DEBUG_PRINT ((ACPI_DB_IO, "PM1 control: Read %X\n", register_value));
+
 		if (read_write == ACPI_WRITE) {
 			register_value &= ~mask;
 			value          <<= acpi_hw_get_bit_shift (mask);
@@ -417,7 +433,6 @@
 			 * Therefore, pass the Register_id, not just generic PM1_CONTROL,
 			 * because we need to do different things. Yuck.
 			 */
-
 			acpi_hw_register_write (ACPI_MTX_DO_NOT_LOCK, register_id,
 					(u16) register_value);
 		}
@@ -438,12 +453,18 @@
 
 		register_value = acpi_hw_register_read (ACPI_MTX_DO_NOT_LOCK, PM2_CONTROL);
 
+		ACPI_DEBUG_PRINT ((ACPI_DB_IO, "PM2 control: Read %X from %p\n",
+			register_value, ACPI_GET_ADDRESS (acpi_gbl_FADT->Xpm2_cnt_blk.address)));
+
 		if (read_write == ACPI_WRITE) {
 			register_value &= ~mask;
 			value          <<= acpi_hw_get_bit_shift (mask);
 			value          &= mask;
 			register_value |= value;
 
+			ACPI_DEBUG_PRINT ((ACPI_DB_IO, "About to write %04X to %p\n", register_value,
+				acpi_gbl_FADT->Xpm2_cnt_blk.address));
+
 			acpi_hw_register_write (ACPI_MTX_DO_NOT_LOCK,
 					   PM2_CONTROL, (u8) (register_value));
 		}
@@ -455,6 +476,9 @@
 		mask = TMR_VAL_MASK;
 		register_value = acpi_hw_register_read (ACPI_MTX_DO_NOT_LOCK,
 				 PM_TIMER);
+		ACPI_DEBUG_PRINT ((ACPI_DB_IO, "PM_TIMER: Read %X from %p\n",
+			register_value, ACPI_GET_ADDRESS (acpi_gbl_FADT->Xpm_tmr_blk.address)));
+
 		break;
 
 
@@ -474,7 +498,6 @@
 		 *     gpe_block_id is one of GPE[01]_EN_BLOCK and GPE[01]_STS_BLOCK
 		 *     gpe_bit_number is relative from the gpe_block (0x00~0xFF)
 		 */
-
 		mask = REGISTER_BIT_ID(register_id); /* gpe_bit_number */
 		register_id = REGISTER_BLOCK_ID(register_id) | (mask >> 3);
 		mask = acpi_gbl_decode_to8bit [mask % 8];
@@ -494,15 +517,21 @@
 		/* Now get the current Enable Bits in the selected Reg */
 
 		register_value = acpi_hw_register_read (ACPI_MTX_DO_NOT_LOCK, register_id);
+		ACPI_DEBUG_PRINT ((ACPI_DB_IO, "GPE Enable bits: Read %X from %X\n",
+			register_value, register_id));
+
 		if (read_write == ACPI_WRITE) {
 			register_value &= ~mask;
 			value          <<= acpi_hw_get_bit_shift (mask);
 			value          &= mask;
 			register_value |= value;
 
-			/* This write will put the Action state into the General Purpose */
-			/* Enable Register indexed by the value in Mask */
-
+			/*
+			 * This write will put the Action state into the General Purpose
+			 * Enable Register indexed by the value in Mask
+			 */
+			ACPI_DEBUG_PRINT ((ACPI_DB_IO, "About to write %04X to %04X\n",
+				register_value, register_id));
 			acpi_hw_register_write (ACPI_MTX_DO_NOT_LOCK, register_id,
 				(u8) register_value);
 			register_value = acpi_hw_register_read (ACPI_MTX_DO_NOT_LOCK,
@@ -513,6 +542,7 @@
 
 	case SMI_CMD_BLOCK:
 	case PROCESSOR_BLOCK:
+
 		/* Not used by any callers at this time - therefore, not implemented */
 
 	default:
@@ -529,7 +559,8 @@
 	register_value &= mask;
 	register_value >>= acpi_hw_get_bit_shift (mask);
 
-	return (register_value);
+	ACPI_DEBUG_PRINT ((ACPI_DB_IO, "Register I/O: returning %X\n", register_value));
+	return_VALUE (register_value);
 }
 
 
@@ -552,10 +583,13 @@
 	u8                      use_lock,
 	u32                     register_id)
 {
-	u32                     value       = 0;
+	u32                     value = 0;
 	u32                     bank_offset;
 
 
+	FUNCTION_TRACE ("Hw_register_read");
+
+
 	if (ACPI_MTX_LOCK == use_lock) {
 		acpi_ut_acquire_mutex (ACPI_MTX_HARDWARE);
 	}
@@ -596,40 +630,42 @@
 		break;
 
 
+	/*
+	 * For the GPE? Blocks, the lower word of Register_id contains the
+	 * byte offset for which to read, as each part of each block may be
+	 * several bytes long.
+	 */
 	case GPE0_STS_BLOCK: /* 8-bit access */
 
-		value =  acpi_hw_low_level_read (8, &acpi_gbl_FADT->Xgpe0blk, 0);
+		bank_offset = REGISTER_BIT_ID(register_id);
+		value = acpi_hw_low_level_read (8, &acpi_gbl_FADT->Xgpe0blk, bank_offset);
 		break;
 
-
 	case GPE0_EN_BLOCK: /* 8-bit access */
 
-		bank_offset = DIV_2 (acpi_gbl_FADT->gpe0blk_len);
-		value =  acpi_hw_low_level_read (8, &acpi_gbl_FADT->Xgpe0blk, bank_offset);
+		bank_offset = DIV_2 (acpi_gbl_FADT->gpe0blk_len) + REGISTER_BIT_ID(register_id);
+		value = acpi_hw_low_level_read (8, &acpi_gbl_FADT->Xgpe0blk, bank_offset);
 		break;
 
-
 	case GPE1_STS_BLOCK: /* 8-bit access */
 
-		value =  acpi_hw_low_level_read (8, &acpi_gbl_FADT->Xgpe1_blk, 0);
+		bank_offset = REGISTER_BIT_ID(register_id);
+		value = acpi_hw_low_level_read (8, &acpi_gbl_FADT->Xgpe1_blk, bank_offset);
 		break;
 
-
 	case GPE1_EN_BLOCK: /* 8-bit access */
 
-		bank_offset = DIV_2 (acpi_gbl_FADT->gpe1_blk_len);
-		value =  acpi_hw_low_level_read (8, &acpi_gbl_FADT->Xgpe1_blk, bank_offset);
+		bank_offset = DIV_2 (acpi_gbl_FADT->gpe1_blk_len) + REGISTER_BIT_ID(register_id);
+		value = acpi_hw_low_level_read (8, &acpi_gbl_FADT->Xgpe1_blk, bank_offset);
 		break;
 
-
 	case SMI_CMD_BLOCK: /* 8bit */
 
-		value = (u32) acpi_os_in8 (acpi_gbl_FADT->smi_cmd);
+		acpi_os_read_port (acpi_gbl_FADT->smi_cmd, &value, 8);
 		break;
 
-
 	default:
-		value = 0;
+		/* Value will be returned as 0 */
 		break;
 	}
 
@@ -638,7 +674,7 @@
 		acpi_ut_release_mutex (ACPI_MTX_HARDWARE);
 	}
 
-	return (value);
+	return_VALUE (value);
 }
 
 
@@ -665,6 +701,9 @@
 	u32                     bank_offset;
 
 
+	FUNCTION_TRACE ("Hw_register_write");
+
+
 	if (ACPI_MTX_LOCK == use_lock) {
 		acpi_ut_acquire_mutex (ACPI_MTX_HARDWARE);
 	}
@@ -719,26 +758,28 @@
 
 	case GPE0_STS_BLOCK: /* 8-bit access */
 
-		acpi_hw_low_level_write (8, value, &acpi_gbl_FADT->Xgpe0blk, 0);
+		bank_offset = REGISTER_BIT_ID(register_id);
+		acpi_hw_low_level_write (8, value, &acpi_gbl_FADT->Xgpe0blk, bank_offset);
 		break;
 
 
 	case GPE0_EN_BLOCK: /* 8-bit access */
 
-		bank_offset = DIV_2 (acpi_gbl_FADT->gpe0blk_len);
+		bank_offset = DIV_2 (acpi_gbl_FADT->gpe0blk_len) + REGISTER_BIT_ID(register_id);
 		acpi_hw_low_level_write (8, value, &acpi_gbl_FADT->Xgpe0blk, bank_offset);
 		break;
 
 
 	case GPE1_STS_BLOCK: /* 8-bit access */
 
-		acpi_hw_low_level_write (8, value, &acpi_gbl_FADT->Xgpe1_blk, 0);
+		bank_offset = REGISTER_BIT_ID(register_id);
+		acpi_hw_low_level_write (8, value, &acpi_gbl_FADT->Xgpe1_blk, bank_offset);
 		break;
 
 
 	case GPE1_EN_BLOCK: /* 8-bit access */
 
-		bank_offset = DIV_2 (acpi_gbl_FADT->gpe1_blk_len);
+		bank_offset = DIV_2 (acpi_gbl_FADT->gpe1_blk_len) + REGISTER_BIT_ID(register_id);
 		acpi_hw_low_level_write (8, value, &acpi_gbl_FADT->Xgpe1_blk, bank_offset);
 		break;
 
@@ -748,7 +789,7 @@
 		/* For 2.0, SMI_CMD is always in IO space */
 		/* TBD: what about 1.0? 0.71? */
 
-		acpi_os_out8 (acpi_gbl_FADT->smi_cmd, (u8) value);
+		acpi_os_write_port (acpi_gbl_FADT->smi_cmd, value, 8);
 		break;
 
 
@@ -762,7 +803,7 @@
 		acpi_ut_release_mutex (ACPI_MTX_HARDWARE);
 	}
 
-	return;
+	return_VOID;
 }
 
 
@@ -783,14 +824,17 @@
 u32
 acpi_hw_low_level_read (
 	u32                     width,
-	ACPI_GENERIC_ADDRESS    *reg,
+	acpi_generic_address    *reg,
 	u32                     offset)
 {
 	u32                     value = 0;
 	ACPI_PHYSICAL_ADDRESS   mem_address;
 	ACPI_IO_ADDRESS         io_address;
-	u32                     pci_register;
-	u32                     pci_dev_func;
+	acpi_pci_id             pci_id;
+	u16                     pci_register;
+
+
+	FUNCTION_ENTRY ();
 
 
 	/*
@@ -807,23 +851,12 @@
 	 * Three address spaces supported:
 	 * Memory, Io, or PCI config.
 	 */
-
 	switch (reg->address_space_id) {
 	case ACPI_ADR_SPACE_SYSTEM_MEMORY:
 
 		mem_address = (ACPI_PHYSICAL_ADDRESS) (ACPI_GET_ADDRESS (reg->address) + offset);
 
-		switch (width) {
-		case 8:
-			value = acpi_os_mem_in8 (mem_address);
-			break;
-		case 16:
-			value = acpi_os_mem_in16 (mem_address);
-			break;
-		case 32:
-			value = acpi_os_mem_in32 (mem_address);
-			break;
-		}
+		acpi_os_read_memory (mem_address, &value, width);
 		break;
 
 
@@ -831,36 +864,19 @@
 
 		io_address = (ACPI_IO_ADDRESS) (ACPI_GET_ADDRESS (reg->address) + offset);
 
-		switch (width) {
-		case 8:
-			value = acpi_os_in8 (io_address);
-			break;
-		case 16:
-			value = acpi_os_in16 (io_address);
-			break;
-		case 32:
-			value = acpi_os_in32 (io_address);
-			break;
-		}
+		acpi_os_read_port (io_address, &value, width);
 		break;
 
 
 	case ACPI_ADR_SPACE_PCI_CONFIG:
 
-		pci_dev_func = ACPI_PCI_DEVFUN  (ACPI_GET_ADDRESS (reg->address));
-		pci_register = ACPI_PCI_REGISTER (ACPI_GET_ADDRESS (reg->address)) + offset;
+		pci_id.segment = 0;
+		pci_id.bus     = 0;
+		pci_id.device  = ACPI_PCI_DEVICE (ACPI_GET_ADDRESS (reg->address));
+		pci_id.function = ACPI_PCI_FUNCTION (ACPI_GET_ADDRESS (reg->address));
+		pci_register   = (u16) (ACPI_PCI_REGISTER (ACPI_GET_ADDRESS (reg->address)) + offset);
 
-		switch (width) {
-		case 8:
-			acpi_os_read_pci_cfg_byte (0, pci_dev_func, pci_register, (u8 *) &value);
-			break;
-		case 16:
-			acpi_os_read_pci_cfg_word (0, pci_dev_func, pci_register, (u16 *) &value);
-			break;
-		case 32:
-			acpi_os_read_pci_cfg_dword (0, pci_dev_func, pci_register, (u32 *) &value);
-			break;
-		}
+		acpi_os_read_pci_configuration (&pci_id, pci_register, &value, width);
 		break;
 	}
 
@@ -888,13 +904,16 @@
 acpi_hw_low_level_write (
 	u32                     width,
 	u32                     value,
-	ACPI_GENERIC_ADDRESS    *reg,
+	acpi_generic_address    *reg,
 	u32                     offset)
 {
 	ACPI_PHYSICAL_ADDRESS   mem_address;
 	ACPI_IO_ADDRESS         io_address;
-	u32                     pci_register;
-	u32                     pci_dev_func;
+	acpi_pci_id             pci_id;
+	u16                     pci_register;
+
+
+	FUNCTION_ENTRY ();
 
 
 	/*
@@ -911,23 +930,12 @@
 	 * Three address spaces supported:
 	 * Memory, Io, or PCI config.
 	 */
-
 	switch (reg->address_space_id) {
 	case ACPI_ADR_SPACE_SYSTEM_MEMORY:
 
 		mem_address = (ACPI_PHYSICAL_ADDRESS) (ACPI_GET_ADDRESS (reg->address) + offset);
 
-		switch (width) {
-		case 8:
-			acpi_os_mem_out8 (mem_address, (u8) value);
-			break;
-		case 16:
-			acpi_os_mem_out16 (mem_address, (u16) value);
-			break;
-		case 32:
-			acpi_os_mem_out32 (mem_address, (u32) value);
-			break;
-		}
+		acpi_os_write_memory (mem_address, value, width);
 		break;
 
 
@@ -935,36 +943,19 @@
 
 		io_address = (ACPI_IO_ADDRESS) (ACPI_GET_ADDRESS (reg->address) + offset);
 
-		switch (width) {
-		case 8:
-			acpi_os_out8 (io_address, (u8) value);
-			break;
-		case 16:
-			acpi_os_out16 (io_address, (u16) value);
-			break;
-		case 32:
-			acpi_os_out32 (io_address, (u32) value);
-			break;
-		}
+		acpi_os_write_port (io_address, value, width);
 		break;
 
 
 	case ACPI_ADR_SPACE_PCI_CONFIG:
 
-		pci_dev_func = ACPI_PCI_DEVFUN  (ACPI_GET_ADDRESS (reg->address));
-		pci_register = ACPI_PCI_REGISTER (ACPI_GET_ADDRESS (reg->address)) + offset;
+		pci_id.segment = 0;
+		pci_id.bus     = 0;
+		pci_id.device  = ACPI_PCI_DEVICE (ACPI_GET_ADDRESS (reg->address));
+		pci_id.function = ACPI_PCI_FUNCTION (ACPI_GET_ADDRESS (reg->address));
+		pci_register   = (u16) (ACPI_PCI_REGISTER (ACPI_GET_ADDRESS (reg->address)) + offset);
 
-		switch (width) {
-		case 8:
-			acpi_os_write_pci_cfg_byte (0, pci_dev_func, pci_register, (u8) value);
-			break;
-		case 16:
-			acpi_os_write_pci_cfg_word (0, pci_dev_func, pci_register, (u16) value);
-			break;
-		case 32:
-			acpi_os_write_pci_cfg_dword (0, pci_dev_func, pci_register, (u32) value);
-			break;
-		}
+		acpi_os_write_pci_configuration (&pci_id, pci_register, value, width);
 		break;
 	}
 }