patch-2.4.10 linux/include/asm-mips64/pgtable.h

• Lines: 141
• Date: Sun Sep 9 10:43:02 2001
• Orig file: v2.4.9/linux/include/asm-mips64/pgtable.h
• Orig date: Wed Jul 25 17:10:25 2001

diff -u --recursive --new-file v2.4.9/linux/include/asm-mips64/pgtable.h linux/include/asm-mips64/pgtable.h
@@ -461,6 +461,23 @@
 }
 
 /*
+ * Macro to make mark a page protection value as "uncacheable".  Note
+ * that "protection" is really a misnomer here as the protection value
+ * contains the memory attribute bits, dirty bits, and various other
+ * bits as well.
+ */
+#define pgprot_noncached pgprot_noncached
+
+static inline pgprot_t pgprot_noncached(pgprot_t _prot)
+{
+	unsigned long prot = pgprot_val(_prot);
+
+	prot = (prot & ~_CACHE_MASK) | _CACHE_UNCACHED;
+
+	return __pgprot(prot);
+}
+
+/*
  * Conversion functions: convert a page and protection to a page entry,
  * and a page entry and page directory to the page they refer to.
  */
@@ -601,9 +618,9 @@
 {
 	__asm__ __volatile__(
 		".set noreorder\n\t"
-		"mtc0 %0, $5\n\t"
+		"mtc0 %z0, $5\n\t"
 		".set reorder"
-		: : "r" (val));
+		: : "Jr" (val));
 }
 
 /* CP0_ENTRYLO0 and CP0_ENTRYLO1 registers */
@@ -623,9 +640,9 @@
 {
 	__asm__ __volatile__(
 		".set noreorder\n\t"
-		"dmtc0 %0, $2\n\t"
+		"dmtc0 %z0, $2\n\t"
 		".set reorder"
-		: : "r" (val));
+		: : "Jr" (val));
 }
 
 extern inline unsigned long get_entrylo1(void)
@@ -644,9 +661,9 @@
 {
 	__asm__ __volatile__(
 		".set noreorder\n\t"
-		"dmtc0 %0, $3\n\t"
+		"dmtc0 %z0, $3\n\t"
 		".set reorder"
-		: : "r" (val));
+		: : "Jr" (val));
 }
 
 /* CP0_ENTRYHI register */
@@ -667,9 +684,9 @@
 {
 	__asm__ __volatile__(
 		".set noreorder\n\t"
-		"dmtc0 %0, $10\n\t"
+		"dmtc0 %z0, $10\n\t"
 		".set reorder"
-		: : "r" (val));
+		: : "Jr" (val));
 }
 
 /* CP0_INDEX register */
@@ -689,9 +706,9 @@
 {
 	__asm__ __volatile__(
 		".set noreorder\n\t"
-		"mtc0 %0, $0\n\t"
+		"mtc0 %z0, $0\n\t"
 		".set reorder\n\t"
-		: : "r" (val));
+		: : "Jr" (val));
 }
 
 /* CP0_WIRED register */
@@ -711,9 +728,9 @@
 {
 	__asm__ __volatile__(
 		"\n\t.set noreorder\n\t"
-		"mtc0 %0, $6\n\t"
+		"mtc0 %z0, $6\n\t"
 		".set reorder"
-		: : "r" (val));
+		: : "Jr" (val));
 }
 
 extern inline unsigned long get_info(void)
@@ -746,9 +763,9 @@
 {
 	__asm__ __volatile__(
 		".set noreorder\n\t"
-		"mtc0 %0, $28\n\t"
+		"mtc0 %z0, $28\n\t"
 		".set reorder"
-		: : "r" (val));
+		: : "Jr" (val));
 }
 
 extern inline unsigned long get_taghi(void)
@@ -767,9 +784,9 @@
 {
 	__asm__ __volatile__(
 		".set noreorder\n\t"
-		"mtc0 %0, $29\n\t"
+		"mtc0 %z0, $29\n\t"
 		".set reorder"
-		: : "r" (val));
+		: : "Jr" (val));
 }
 
 /* CP0_CONTEXT register */
@@ -790,13 +807,18 @@
 {
 	__asm__ __volatile__(
 		".set noreorder\n\t"
-		"dmtc0 %0, $4\n\t"
+		"dmtc0 %z0, $4\n\t"
 		".set reorder"
-		: : "r" (val));
+		: : "Jr" (val));
 }
 
 #include <asm-generic/pgtable.h>
 
 #endif /* !defined (_LANGUAGE_ASSEMBLY) */
+
+/*
+ * No page table caches to initialise
+ */
+#define pgtable_cache_init()	do { } while (0)
 
 #endif /* _ASM_PGTABLE_H */