patch-2.4.21 linux-2.4.21/arch/ia64/sn/tools/make_textsym

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diff -urN linux-2.4.20/arch/ia64/sn/tools/make_textsym linux-2.4.21/arch/ia64/sn/tools/make_textsym
@@ -44,7 +44,7 @@
 
 [ -f $VMLINUX ] || help
 
-$OBJDUMP -t $LINUX | sort > $TMPSYM
+$OBJDUMP -t $LINUX | egrep -v '__ks' | sort > $TMPSYM
 SN1=`egrep "dig_setup|Synergy_da_indr" $TMPSYM|wc -l`
 
 # Dataprefix and textprefix correspond to the VGLOBAL_BASE and VPERNODE_BASE.
@@ -58,74 +58,74 @@
 # pipe everything thru sort
 echo "TEXTSYM V1.0"
 (cat <<END 
-GLOBAL | ${textprefix}00400000 | CODE | VEC_VHPT_Translation_0000
-GLOBAL | ${textprefix}00400400 | CODE | VEC_ITLB_0400
-GLOBAL | ${textprefix}00400800 | CODE | VEC_DTLB_0800
-GLOBAL | ${textprefix}00400c00 | CODE | VEC_Alt_ITLB_0c00
-GLOBAL | ${textprefix}00401000 | CODE | VEC_Alt_DTLB_1000
-GLOBAL | ${textprefix}00401400 | CODE | VEC_Data_nested_TLB_1400
-GLOBAL | ${textprefix}00401800 | CODE | VEC_Instruction_Key_Miss_1800
-GLOBAL | ${textprefix}00401c00 | CODE | VEC_Data_Key_Miss_1c00
-GLOBAL | ${textprefix}00402000 | CODE | VEC_Dirty-bit_2000
-GLOBAL | ${textprefix}00402400 | CODE | VEC_Instruction_Access-bit_2400
-GLOBAL | ${textprefix}00402800 | CODE | VEC_Data_Access-bit_2800
-GLOBAL | ${textprefix}00402c00 | CODE | VEC_Break_instruction_2c00
-GLOBAL | ${textprefix}00403000 | CODE | VEC_External_Interrupt_3000
-GLOBAL | ${textprefix}00403400 | CODE | VEC_Reserved_3400
-GLOBAL | ${textprefix}00403800 | CODE | VEC_Reserved_3800
-GLOBAL | ${textprefix}00403c00 | CODE | VEC_Reserved_3c00
-GLOBAL | ${textprefix}00404000 | CODE | VEC_Reserved_4000
-GLOBAL | ${textprefix}00404400 | CODE | VEC_Reserved_4400
-GLOBAL | ${textprefix}00404800 | CODE | VEC_Reserved_4800
-GLOBAL | ${textprefix}00404c00 | CODE | VEC_Reserved_4c00
-GLOBAL | ${textprefix}00405000 | CODE | VEC_Page_Not_Present_5000
-GLOBAL | ${textprefix}00405100 | CODE | VEC_Key_Permission_5100
-GLOBAL | ${textprefix}00405200 | CODE | VEC_Instruction_Access_Rights_5200
-GLOBAL | ${textprefix}00405300 | CODE | VEC_Data_Access_Rights_5300
-GLOBAL | ${textprefix}00405400 | CODE | VEC_General_Exception_5400
-GLOBAL | ${textprefix}00405500 | CODE | VEC_Disabled_FP-Register_5500
-GLOBAL | ${textprefix}00405600 | CODE | VEC_Nat_Consumption_5600
-GLOBAL | ${textprefix}00405700 | CODE | VEC_Speculation_5700
-GLOBAL | ${textprefix}00405800 | CODE | VEC_Reserved_5800
-GLOBAL | ${textprefix}00405900 | CODE | VEC_Debug_5900
-GLOBAL | ${textprefix}00405a00 | CODE | VEC_Unaligned_Reference_5a00
-GLOBAL | ${textprefix}00405b00 | CODE | VEC_Unsupported_Data_Reference_5b00
-GLOBAL | ${textprefix}00405c00 | CODE | VEC_Floating-Point_Fault_5c00
-GLOBAL | ${textprefix}00405d00 | CODE | VEC_Floating_Point_Trap_5d00
-GLOBAL | ${textprefix}00405e00 | CODE | VEC_Lower_Privilege_Tranfer_Trap_5e00
-GLOBAL | ${textprefix}00405f00 | CODE | VEC_Taken_Branch_Trap_5f00
-GLOBAL | ${textprefix}00406000 | CODE | VEC_Single_Step_Trap_6000
-GLOBAL | ${textprefix}00406100 | CODE | VEC_Reserved_6100
-GLOBAL | ${textprefix}00406200 | CODE | VEC_Reserved_6200
-GLOBAL | ${textprefix}00406300 | CODE | VEC_Reserved_6300
-GLOBAL | ${textprefix}00406400 | CODE | VEC_Reserved_6400
-GLOBAL | ${textprefix}00406500 | CODE | VEC_Reserved_6500
-GLOBAL | ${textprefix}00406600 | CODE | VEC_Reserved_6600
-GLOBAL | ${textprefix}00406700 | CODE | VEC_Reserved_6700
-GLOBAL | ${textprefix}00406800 | CODE | VEC_Reserved_6800
-GLOBAL | ${textprefix}00406900 | CODE | VEC_IA-32_Exeception_6900
-GLOBAL | ${textprefix}00406a00 | CODE | VEC_IA-32_Intercept_6a00
-GLOBAL | ${textprefix}00406b00 | CODE | VEC_IA-32_Interrupt_6b00
-GLOBAL | ${textprefix}00406c00 | CODE | VEC_Reserved_6c00
-GLOBAL | ${textprefix}00406d00 | CODE | VEC_Reserved_6d00
-GLOBAL | ${textprefix}00406e00 | CODE | VEC_Reserved_6e00
-GLOBAL | ${textprefix}00406f00 | CODE | VEC_Reserved_6f00
-GLOBAL | ${textprefix}00407000 | CODE | VEC_Reserved_7000
-GLOBAL | ${textprefix}00407100 | CODE | VEC_Reserved_7100
-GLOBAL | ${textprefix}00407200 | CODE | VEC_Reserved_7200
-GLOBAL | ${textprefix}00407300 | CODE | VEC_Reserved_7300
-GLOBAL | ${textprefix}00407400 | CODE | VEC_Reserved_7400
-GLOBAL | ${textprefix}00407500 | CODE | VEC_Reserved_7500
-GLOBAL | ${textprefix}00407600 | CODE | VEC_Reserved_7600
-GLOBAL | ${textprefix}00407700 | CODE | VEC_Reserved_7700
-GLOBAL | ${textprefix}00407800 | CODE | VEC_Reserved_7800
-GLOBAL | ${textprefix}00407900 | CODE | VEC_Reserved_7900
-GLOBAL | ${textprefix}00407a00 | CODE | VEC_Reserved_7a00
-GLOBAL | ${textprefix}00407b00 | CODE | VEC_Reserved_7b00
-GLOBAL | ${textprefix}00407c00 | CODE | VEC_Reserved_7c00
-GLOBAL | ${textprefix}00407d00 | CODE | VEC_Reserved_7d00
-GLOBAL | ${textprefix}00407e00 | CODE | VEC_Reserved_7e00
-GLOBAL | ${textprefix}00407f00 | CODE | VEC_Reserved_7f00
+GLOBAL | ${textprefix}00000000 | CODE | VEC_VHPT_Translation_0000
+GLOBAL | ${textprefix}00000400 | CODE | VEC_ITLB_0400
+GLOBAL | ${textprefix}00000800 | CODE | VEC_DTLB_0800
+GLOBAL | ${textprefix}00000c00 | CODE | VEC_Alt_ITLB_0c00
+GLOBAL | ${textprefix}00001000 | CODE | VEC_Alt_DTLB_1000
+GLOBAL | ${textprefix}00001400 | CODE | VEC_Data_nested_TLB_1400
+GLOBAL | ${textprefix}00001800 | CODE | VEC_Instruction_Key_Miss_1800
+GLOBAL | ${textprefix}00001c00 | CODE | VEC_Data_Key_Miss_1c00
+GLOBAL | ${textprefix}00002000 | CODE | VEC_Dirty-bit_2000
+GLOBAL | ${textprefix}00002400 | CODE | VEC_Instruction_Access-bit_2400
+GLOBAL | ${textprefix}00002800 | CODE | VEC_Data_Access-bit_2800
+GLOBAL | ${textprefix}00002c00 | CODE | VEC_Break_instruction_2c00
+GLOBAL | ${textprefix}00003000 | CODE | VEC_External_Interrupt_3000
+GLOBAL | ${textprefix}00003400 | CODE | VEC_Reserved_3400
+GLOBAL | ${textprefix}00003800 | CODE | VEC_Reserved_3800
+GLOBAL | ${textprefix}00003c00 | CODE | VEC_Reserved_3c00
+GLOBAL | ${textprefix}00004000 | CODE | VEC_Reserved_4000
+GLOBAL | ${textprefix}00004400 | CODE | VEC_Reserved_4400
+GLOBAL | ${textprefix}00004800 | CODE | VEC_Reserved_4800
+GLOBAL | ${textprefix}00004c00 | CODE | VEC_Reserved_4c00
+GLOBAL | ${textprefix}00005000 | CODE | VEC_Page_Not_Present_5000
+GLOBAL | ${textprefix}00005100 | CODE | VEC_Key_Permission_5100
+GLOBAL | ${textprefix}00005200 | CODE | VEC_Instruction_Access_Rights_5200
+GLOBAL | ${textprefix}00005300 | CODE | VEC_Data_Access_Rights_5300
+GLOBAL | ${textprefix}00005400 | CODE | VEC_General_Exception_5400
+GLOBAL | ${textprefix}00005500 | CODE | VEC_Disabled_FP-Register_5500
+GLOBAL | ${textprefix}00005600 | CODE | VEC_Nat_Consumption_5600
+GLOBAL | ${textprefix}00005700 | CODE | VEC_Speculation_5700
+GLOBAL | ${textprefix}00005800 | CODE | VEC_Reserved_5800
+GLOBAL | ${textprefix}00005900 | CODE | VEC_Debug_5900
+GLOBAL | ${textprefix}00005a00 | CODE | VEC_Unaligned_Reference_5a00
+GLOBAL | ${textprefix}00005b00 | CODE | VEC_Unsupported_Data_Reference_5b00
+GLOBAL | ${textprefix}00005c00 | CODE | VEC_Floating-Point_Fault_5c00
+GLOBAL | ${textprefix}00005d00 | CODE | VEC_Floating_Point_Trap_5d00
+GLOBAL | ${textprefix}00005e00 | CODE | VEC_Lower_Privilege_Tranfer_Trap_5e00
+GLOBAL | ${textprefix}00005f00 | CODE | VEC_Taken_Branch_Trap_5f00
+GLOBAL | ${textprefix}00006000 | CODE | VEC_Single_Step_Trap_6000
+GLOBAL | ${textprefix}00006100 | CODE | VEC_Reserved_6100
+GLOBAL | ${textprefix}00006200 | CODE | VEC_Reserved_6200
+GLOBAL | ${textprefix}00006300 | CODE | VEC_Reserved_6300
+GLOBAL | ${textprefix}00006400 | CODE | VEC_Reserved_6400
+GLOBAL | ${textprefix}00006500 | CODE | VEC_Reserved_6500
+GLOBAL | ${textprefix}00006600 | CODE | VEC_Reserved_6600
+GLOBAL | ${textprefix}00006700 | CODE | VEC_Reserved_6700
+GLOBAL | ${textprefix}00006800 | CODE | VEC_Reserved_6800
+GLOBAL | ${textprefix}00006900 | CODE | VEC_IA-32_Exeception_6900
+GLOBAL | ${textprefix}00006a00 | CODE | VEC_IA-32_Intercept_6a00
+GLOBAL | ${textprefix}00006b00 | CODE | VEC_IA-32_Interrupt_6b00
+GLOBAL | ${textprefix}00006c00 | CODE | VEC_Reserved_6c00
+GLOBAL | ${textprefix}00006d00 | CODE | VEC_Reserved_6d00
+GLOBAL | ${textprefix}00006e00 | CODE | VEC_Reserved_6e00
+GLOBAL | ${textprefix}00006f00 | CODE | VEC_Reserved_6f00
+GLOBAL | ${textprefix}00007000 | CODE | VEC_Reserved_7000
+GLOBAL | ${textprefix}00007100 | CODE | VEC_Reserved_7100
+GLOBAL | ${textprefix}00007200 | CODE | VEC_Reserved_7200
+GLOBAL | ${textprefix}00007300 | CODE | VEC_Reserved_7300
+GLOBAL | ${textprefix}00007400 | CODE | VEC_Reserved_7400
+GLOBAL | ${textprefix}00007500 | CODE | VEC_Reserved_7500
+GLOBAL | ${textprefix}00007600 | CODE | VEC_Reserved_7600
+GLOBAL | ${textprefix}00007700 | CODE | VEC_Reserved_7700
+GLOBAL | ${textprefix}00007800 | CODE | VEC_Reserved_7800
+GLOBAL | ${textprefix}00007900 | CODE | VEC_Reserved_7900
+GLOBAL | ${textprefix}00007a00 | CODE | VEC_Reserved_7a00
+GLOBAL | ${textprefix}00007b00 | CODE | VEC_Reserved_7b00
+GLOBAL | ${textprefix}00007c00 | CODE | VEC_Reserved_7c00
+GLOBAL | ${textprefix}00007d00 | CODE | VEC_Reserved_7d00
+GLOBAL | ${textprefix}00007e00 | CODE | VEC_Reserved_7e00
+GLOBAL | ${textprefix}00007f00 | CODE | VEC_Reserved_7f00
 END
 
 
@@ -157,10 +157,10 @@
 	print $0
 	if (sn1 != 0) {
 		/* 32 bits of sn1 physical addrs, */
-		print substr($0,1,9) substr($0,18,18) "Phy_" substr($0,36)
+		print substr($0,1,9) "04" substr($0,20,16) "Phy_" substr($0,36)
 	} else {
 		/* 38 bits of sn2 physical addrs, need addr space bits */
-		print substr($0,1,9) "30" substr($0,18,18) "Phy_" substr($0,36)
+		print substr($0,1,9) "3004" substr($0,20,16) "Phy_" substr($0,36)
 	}
 
 } ' | sort -k3

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TCL-scripts by Sam Shen (who was at: slshen@lbl.gov)