patch-2.4.27 linux-2.4.27/drivers/net/pcnet32.c
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- Lines: 2022
- Date:
2004-08-07 16:26:05.127366213 -0700
- Orig file:
linux-2.4.26/drivers/net/pcnet32.c
- Orig date:
2004-04-14 06:05:30.000000000 -0700
diff -urN linux-2.4.26/drivers/net/pcnet32.c linux-2.4.27/drivers/net/pcnet32.c
@@ -1,12 +1,12 @@
/* pcnet32.c: An AMD PCnet32 ethernet driver for linux. */
/*
* Copyright 1996-1999 Thomas Bogendoerfer
- *
+ *
* Derived from the lance driver written 1993,1994,1995 by Donald Becker.
- *
+ *
* Copyright 1993 United States Government as represented by the
* Director, National Security Agency.
- *
+ *
* This software may be used and distributed according to the terms
* of the GNU General Public License, incorporated herein by reference.
*
@@ -22,19 +22,16 @@
*************************************************************************/
#define DRV_NAME "pcnet32"
-#define DRV_VERSION "1.28"
-#define DRV_RELDATE "02.20.2004"
+#define DRV_VERSION "1.30c"
+#define DRV_RELDATE "05.25.2004"
#define PFX DRV_NAME ": "
static const char *version =
DRV_NAME ".c:v" DRV_VERSION " " DRV_RELDATE " tsbogend@alpha.franken.de\n";
#include <linux/module.h>
-
#include <linux/kernel.h>
-#include <linux/sched.h>
#include <linux/string.h>
-#include <linux/ptrace.h>
#include <linux/errno.h>
#include <linux/ioport.h>
#include <linux/slab.h>
@@ -45,16 +42,17 @@
#include <linux/ethtool.h>
#include <linux/mii.h>
#include <linux/crc32.h>
-#include <asm/bitops.h>
-#include <asm/io.h>
-#include <asm/dma.h>
-#include <asm/uaccess.h>
-
#include <linux/netdevice.h>
#include <linux/etherdevice.h>
#include <linux/skbuff.h>
#include <linux/spinlock.h>
+#include <asm/bitops.h>
+#include <asm/dma.h>
+#include <asm/io.h>
+#include <asm/uaccess.h>
+#include <asm/irq.h>
+
/*
* PCI device identifiers for "new style" Linux PCI Device Drivers
*/
@@ -74,10 +72,10 @@
static int cards_found __devinitdata;
-/*
- * VLB I/O addresses
+/*
+ * VLB I/O addresses
*/
-static unsigned int pcnet32_portlist[] __initdata =
+static unsigned int pcnet32_portlist[] __initdata =
{ 0x300, 0x320, 0x340, 0x360, 0 };
@@ -88,7 +86,7 @@
static struct net_device *pcnet32_dev;
-static int max_interrupt_work = 80;
+static int max_interrupt_work = 2;
static int rx_copybreak = 200;
#define PCNET32_PORT_AUI 0x00
@@ -103,6 +101,9 @@
#define PCNET32_DMA_MASK 0xffffffff
+#define PCNET32_WATCHDOG_TIMEOUT (jiffies + (2 * HZ))
+#define PCNET32_BLINK_TIMEOUT (jiffies + (HZ/4))
+
/*
* table to translate option values from tulip
* to internal options
@@ -110,7 +111,7 @@
static unsigned char options_mapping[] = {
PCNET32_PORT_ASEL, /* 0 Auto-select */
PCNET32_PORT_AUI, /* 1 BNC/AUI */
- PCNET32_PORT_AUI, /* 2 AUI/BNC */
+ PCNET32_PORT_AUI, /* 2 AUI/BNC */
PCNET32_PORT_ASEL, /* 3 not supported */
PCNET32_PORT_10BT | PCNET32_PORT_FD, /* 4 10baseT-FD */
PCNET32_PORT_ASEL, /* 5 not supported */
@@ -131,20 +132,22 @@
};
#define PCNET32_TEST_LEN (sizeof(pcnet32_gstrings_test) / ETH_GSTRING_LEN)
+#define PCNET32_NUM_REGS 168
+
#define MAX_UNITS 8 /* More are supported, limit only on options */
static int options[MAX_UNITS];
static int full_duplex[MAX_UNITS];
/*
* Theory of Operation
- *
+ *
* This driver uses the same software structure as the normal lance
* driver. So look for a verbose description in lance.c. The differences
* to the normal lance driver is the use of the 32bit mode of PCnet32
* and PCnetPCI chips. Because these chips are 32bit chips, there is no
* 16MB limitation and we don't need bounce buffers.
*/
-
+
/*
* History:
* v0.01: Initial version
@@ -198,7 +201,7 @@
* v1.22: changed pci scanning code to make PPC people happy
* fixed switching to 32bit mode in pcnet32_open() (thanks
* to Michael Richard <mcr@solidum.com> for noticing this one)
- * added sub vendor/device id matching (thanks again to
+ * added sub vendor/device id matching (thanks again to
* Michael Richard <mcr@solidum.com>)
* added chip id for 79c973/975 (thanks to Zach Brown <zab@zabbo.net>)
* v1.23 fixed small bug, when manual selecting MII speed/duplex
@@ -216,13 +219,15 @@
* v1.26p Fix oops on rmmod+insmod; plug i/o resource leak - Paul Gortmaker
* v1.27 improved CSR/PROM address detection, lots of cleanups,
* new pcnet32vlb module option, HP-PARISC support,
- * added module parameter descriptions,
+ * added module parameter descriptions,
* initial ethtool support - Helge Deller <deller@gmx.de>
* v1.27a Sun Feb 10 2002 Go Taniguchi <go@turbolinux.co.jp>
* use alloc_etherdev and register_netdev
* fix pci probe not increment cards_found
* FD auto negotiate error workaround for xSeries250
* clean up and using new mii module
+ * v1.27b Sep 30 2002 Kent Yoder <yoder1@us.ibm.com>
+ * Added timer for cable connection state changes.
* v1.28 20 Feb 2004 Don Fry <brazilnut@us.ibm.com>
* Jon Mason <jonmason@us.ibm.com>, Chinmay Albal <albal@in.ibm.com>
* Now uses ethtool_ops, netif_msg_* and generic_mii_ioctl.
@@ -230,6 +235,16 @@
* length errors, and transmit hangs. Cleans up after errors in open.
* Jim Lewis <jklewis@us.ibm.com> added ethernet loopback test.
* Thomas Munck Steenholdt <tmus@tmus.dk> non-mii ioctl corrections.
+ * v1.29 6 Apr 2004 Jim Lewis <jklewis@us.ibm.com> added physical
+ * identification code (blink led's) and register dump.
+ * Don Fry added timer for 971/972 so skbufs don't remain on tx ring
+ * forever.
+ * v1.30 18 May 2004 Don Fry removed timer and Last Transmit Interrupt
+ * (ltint) as they added complexity and didn't give good throughput.
+ * v1.30a 22 May 2004 Don Fry limit frames received during interrupt.
+ * v1.30b 24 May 2004 Don Fry fix bogus tx carrier errors with 79c973,
+ * assisted by Bruce Penrod <bmpenrod@endruntechnologies.com>.
+ * v1.30c 25 May 2004 Don Fry added netif_wake_queue after pcnet32_restart.
*/
@@ -270,11 +285,11 @@
struct pcnet32_rx_head {
u32 base;
s16 buf_length;
- s16 status;
+ s16 status;
u32 msg_length;
u32 reserved;
};
-
+
struct pcnet32_tx_head {
u32 base;
s16 length;
@@ -290,7 +305,7 @@
u8 phys_addr[6];
u16 reserved;
u32 filter[2];
- /* Receive and transmit ring base, along with extra bits. */
+ /* Receive and transmit ring base, along with extra bits. */
u32 rx_ring;
u32 tx_ring;
};
@@ -307,7 +322,7 @@
};
/*
- * The first three fields of pcnet32_private are read by the ethernet device
+ * The first three fields of pcnet32_private are read by the ethernet device
* so we allocate the structure should be allocated by pci_alloc_consistent().
*/
struct pcnet32_private {
@@ -315,16 +330,18 @@
struct pcnet32_rx_head rx_ring[RX_RING_SIZE];
struct pcnet32_tx_head tx_ring[TX_RING_SIZE];
struct pcnet32_init_block init_block;
- dma_addr_t dma_addr; /* DMA address of beginning of this object,
- returned by pci_alloc_consistent */
- struct pci_dev *pci_dev; /* Pointer to the associated pci device structure */
+ dma_addr_t dma_addr; /* DMA address of beginning of this
+ object, returned by
+ pci_alloc_consistent */
+ struct pci_dev *pci_dev; /* Pointer to the associated pci device
+ structure */
const char *name;
/* The saved address of a sent-in-place packet/buffer, for skfree(). */
struct sk_buff *tx_skbuff[TX_RING_SIZE];
struct sk_buff *rx_skbuff[RX_RING_SIZE];
dma_addr_t tx_dma_addr[TX_RING_SIZE];
dma_addr_t rx_dma_addr[RX_RING_SIZE];
- struct pcnet32_access a;
+ struct pcnet32_access a;
spinlock_t lock; /* Guard lock */
unsigned int cur_rx, cur_tx; /* The next free ring entry */
unsigned int dirty_rx, dirty_tx; /* The ring entries to be free()ed. */
@@ -332,11 +349,12 @@
char tx_full;
int options;
int shared_irq:1, /* shared irq possible */
- ltint:1, /* enable TxDone-intr inhibitor */
dxsuflo:1, /* disable transmit stop on uflo */
mii:1; /* mii port available */
struct net_device *next;
- struct mii_if_info mii_if;
+ struct mii_if_info mii_if;
+ struct timer_list watchdog_timer;
+ struct timer_list blink_timer;
u32 msg_enable; /* debug message level */
};
@@ -351,14 +369,21 @@
static void pcnet32_interrupt(int, void *, struct pt_regs *);
static int pcnet32_close(struct net_device *);
static struct net_device_stats *pcnet32_get_stats(struct net_device *);
+static void pcnet32_load_multicast(struct net_device *dev);
static void pcnet32_set_multicast_list(struct net_device *);
static int pcnet32_ioctl(struct net_device *, struct ifreq *, int);
+static void pcnet32_watchdog(struct net_device *);
static int mdio_read(struct net_device *dev, int phy_id, int reg_num);
static void mdio_write(struct net_device *dev, int phy_id, int reg_num, int val);
static void pcnet32_restart(struct net_device *dev, unsigned int csr0_bits);
static void pcnet32_ethtool_test(struct net_device *dev,
struct ethtool_test *eth_test, u64 *data);
static int pcnet32_loopback_test(struct net_device *dev, uint64_t *data1);
+static int pcnet32_phys_id(struct net_device *dev, u32 data);
+static void pcnet32_led_blink_callback(struct net_device *dev);
+static int pcnet32_get_regs_len(struct net_device *dev);
+static void pcnet32_get_regs(struct net_device *dev, struct ethtool_regs *regs,
+ void *ptr);
enum pci_flags_bit {
PCI_USES_IO=1, PCI_USES_MEM=2, PCI_USES_MASTER=4,
@@ -476,6 +501,14 @@
.reset = pcnet32_dwio_reset
};
+#ifdef CONFIG_NET_POLL_CONTROLLER
+static void pcnet32_poll_controller(struct net_device *dev)
+{
+ disable_irq(dev->irq);
+ pcnet32_interrupt(0, dev, NULL);
+ enable_irq(dev->irq);
+}
+#endif
static int pcnet32_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
@@ -509,14 +542,14 @@
static void pcnet32_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
{
- struct pcnet32_private *lp = dev->priv;
-
- strcpy (info->driver, DRV_NAME);
- strcpy (info->version, DRV_VERSION);
- if (lp->pci_dev)
- strcpy (info->bus_info, pci_name(lp->pci_dev));
- else
- sprintf(info->bus_info, "VLB 0x%lx", dev->base_addr);
+ struct pcnet32_private *lp = dev->priv;
+
+ strcpy (info->driver, DRV_NAME);
+ strcpy (info->version, DRV_VERSION);
+ if (lp->pci_dev)
+ strcpy (info->bus_info, pci_name(lp->pci_dev));
+ else
+ sprintf(info->bus_info, "VLB 0x%lx", dev->base_addr);
}
static u32 pcnet32_get_link(struct net_device *dev)
@@ -539,16 +572,16 @@
static u32 pcnet32_get_msglevel(struct net_device *dev)
{
- struct pcnet32_private *lp = dev->priv;
- return lp->msg_enable;
+ struct pcnet32_private *lp = dev->priv;
+ return lp->msg_enable;
}
-
+
static void pcnet32_set_msglevel(struct net_device *dev, u32 value)
{
- struct pcnet32_private *lp = dev->priv;
- lp->msg_enable = value;
+ struct pcnet32_private *lp = dev->priv;
+ lp->msg_enable = value;
}
-
+
static int pcnet32_nway_reset(struct net_device *dev)
{
struct pcnet32_private *lp = dev->priv;
@@ -565,12 +598,12 @@
static void pcnet32_get_ringparam(struct net_device *dev, struct ethtool_ringparam *ering)
{
- struct pcnet32_private *lp = dev->priv;
+ struct pcnet32_private *lp = dev->priv;
- ering->tx_max_pending = TX_RING_SIZE - 1;
- ering->tx_pending = lp->cur_tx - lp->dirty_tx;
- ering->rx_max_pending = RX_RING_SIZE - 1;
- ering->rx_pending = lp->cur_rx & RX_RING_MOD_MASK;
+ ering->tx_max_pending = TX_RING_SIZE - 1;
+ ering->tx_pending = lp->cur_tx - lp->dirty_tx;
+ ering->rx_max_pending = RX_RING_SIZE - 1;
+ ering->rx_pending = lp->cur_rx & RX_RING_MOD_MASK;
}
static void pcnet32_get_strings(struct net_device *dev, u32 stringset, u8 *data)
@@ -597,7 +630,7 @@
test->flags |= ETH_TEST_FL_FAILED;
} else if (netif_msg_hw(lp))
printk(KERN_DEBUG "%s: Loopback test passed.\n", dev->name);
- } else
+ } else if (netif_msg_hw(lp))
printk(KERN_DEBUG "%s: No tests to run (specify 'Offline' on ethtool).", dev->name);
} /* end pcnet32_ethtool_test */
@@ -607,32 +640,40 @@
struct pcnet32_access *a = &lp->a; /* access to registers */
ulong ioaddr = dev->base_addr; /* card base I/O address */
struct sk_buff *skb; /* sk buff */
- int x, y, i; /* counters */
+ int x, i; /* counters */
int numbuffs = 4; /* number of TX/RX buffers and descs */
u16 status = 0x8300; /* TX ring status */
+ u16 teststatus; /* test of ring status */
int rc; /* return code */
int size; /* size of packets */
unsigned char *packet; /* source packet data */
static int data_len = 60; /* length of source packets */
unsigned long flags;
+ unsigned long ticks;
*data1 = 1; /* status of test, default to fail */
rc = 1; /* default to fail */
+ if (netif_running(dev))
+ pcnet32_close(dev);
+
spin_lock_irqsave(&lp->lock, flags);
- lp->a.write_csr(ioaddr, 0, 0x7904);
- netif_stop_queue(dev);
+ /* Reset the PCNET32 */
+ lp->a.reset (ioaddr);
+
+ /* switch pcnet32 to 32bit mode */
+ lp->a.write_bcr (ioaddr, 20, 2);
+
+ lp->init_block.mode = le16_to_cpu((lp->options & PCNET32_PORT_PORTSEL) << 7);
+ lp->init_block.filter[0] = 0;
+ lp->init_block.filter[1] = 0;
/* purge & init rings but don't actually restart */
pcnet32_restart(dev, 0x0000);
lp->a.write_csr(ioaddr, 0, 0x0004); /* Set STOP bit */
- x = a->read_bcr(ioaddr, 32); /* set internal loopback in BSR32 */
- x = x | 0x00000002;
- a->write_bcr(ioaddr, 32, x);
-
/* Initialize Transmit buffers. */
size = data_len + 15;
for (x=0; x<numbuffs; x++) {
@@ -646,19 +687,21 @@
skb_put(skb, size); /* create space for data */
lp->tx_skbuff[x] = skb;
lp->tx_ring[x].length = le16_to_cpu(-skb->len);
- lp->tx_ring[x].misc = 0x00000000;
+ lp->tx_ring[x].misc = 0;
- /* put DA and SA into the skb */
- for (i=0; i<12; i++)
- *packet++ = 0xff;
+ /* put DA and SA into the skb */
+ for (i=0; i<6; i++)
+ *packet++ = dev->dev_addr[i];
+ for (i=0; i<6; i++)
+ *packet++ = dev->dev_addr[i];
/* type */
*packet++ = 0x08;
*packet++ = 0x06;
/* packet number */
*packet++ = x;
/* fill packet with data */
- for (y=0; y<data_len; y++)
- *packet++ = y;
+ for (i=0; i<data_len; i++)
+ *packet++ = i;
lp->tx_dma_addr[x] = pci_map_single(lp->pci_dev, skb->data,
skb->len, PCI_DMA_TODEVICE);
@@ -668,20 +711,41 @@
}
}
- lp->a.write_csr(ioaddr, 0, 0x0002); /* Set STRT bit */
- spin_unlock_irqrestore(&lp->lock, flags);
+ x = a->read_bcr(ioaddr, 32); /* set internal loopback in BSR32 */
+ x = x | 0x0002;
+ a->write_bcr(ioaddr, 32, x);
- mdelay(50); /* wait a bit */
+ lp->a.write_csr (ioaddr, 15, 0x0044); /* set int loopback in CSR15 */
- spin_lock_irqsave(&lp->lock, flags);
- lp->a.write_csr(ioaddr, 0, 0x0004); /* Set STOP bit */
+ teststatus = le16_to_cpu(0x8000);
+ lp->a.write_csr(ioaddr, 0, 0x0002); /* Set STRT bit */
+
+ /* Check status of descriptors */
+ for (x=0; x<numbuffs; x++) {
+ ticks = 0;
+ rmb();
+ while ((lp->rx_ring[x].status & teststatus) && (ticks < 200)) {
+ spin_unlock_irqrestore(&lp->lock, flags);
+ mdelay(1);
+ spin_lock_irqsave(&lp->lock, flags);
+ rmb();
+ ticks++;
+ }
+ if (ticks == 200) {
+ if (netif_msg_hw(lp))
+ printk("%s: Desc %d failed to reset!\n",dev->name,x);
+ break;
+ }
+ }
+ lp->a.write_csr(ioaddr, 0, 0x0004); /* Set STOP bit */
+ wmb();
if (netif_msg_hw(lp) && netif_msg_pktdata(lp)) {
printk(KERN_DEBUG "%s: RX loopback packets:\n", dev->name);
for (x=0; x<numbuffs; x++) {
printk(KERN_DEBUG "%s: Packet %d:\n", dev->name, x);
- skb=lp->rx_skbuff[x];
+ skb = lp->rx_skbuff[x];
for (i=0; i<size; i++) {
printk("%02x ", *(skb->data+i));
}
@@ -714,20 +778,153 @@
a->write_csr(ioaddr, 15, (x & ~0x0044)); /* reset bits 6 and 2 */
x = a->read_bcr(ioaddr, 32); /* reset internal loopback */
- x = x & ~0x00000002;
+ x = x & ~0x0002;
a->write_bcr(ioaddr, 32, x);
- pcnet32_restart(dev, 0x0042); /* resume normal operation */
-
- netif_wake_queue(dev);
-
- /* Clear interrupts, and set interrupt enable. */
- lp->a.write_csr(ioaddr, 0, 0x7940);
spin_unlock_irqrestore(&lp->lock, flags);
+ if (netif_running(dev)) {
+ pcnet32_open(dev);
+ } else {
+ lp->a.write_bcr (ioaddr, 20, 4); /* return to 16bit mode */
+ }
+
return(rc);
} /* end pcnet32_loopback_test */
+static void pcnet32_led_blink_callback(struct net_device *dev)
+{
+ struct pcnet32_private *lp = dev->priv;
+ struct pcnet32_access *a = &lp->a;
+ ulong ioaddr = dev->base_addr;
+ unsigned long flags;
+ int i;
+
+ spin_lock_irqsave(&lp->lock, flags);
+ for (i=4; i<8; i++) {
+ a->write_bcr(ioaddr, i, a->read_bcr(ioaddr, i) ^ 0x4000);
+ }
+ spin_unlock_irqrestore(&lp->lock, flags);
+
+ mod_timer(&lp->blink_timer, PCNET32_BLINK_TIMEOUT);
+}
+
+static int pcnet32_phys_id(struct net_device *dev, u32 data)
+{
+ struct pcnet32_private *lp = dev->priv;
+ struct pcnet32_access *a = &lp->a;
+ ulong ioaddr = dev->base_addr;
+ unsigned long flags;
+ int i, regs[4];
+
+ if (!lp->blink_timer.function) {
+ init_timer(&lp->blink_timer);
+ lp->blink_timer.function = (void *) pcnet32_led_blink_callback;
+ lp->blink_timer.data = (unsigned long) dev;
+ }
+
+ /* Save the current value of the bcrs */
+ spin_lock_irqsave(&lp->lock, flags);
+ for (i=4; i<8; i++) {
+ regs[i-4] = a->read_bcr(ioaddr, i);
+ }
+ spin_unlock_irqrestore(&lp->lock, flags);
+
+ mod_timer(&lp->blink_timer, jiffies);
+ set_current_state(TASK_INTERRUPTIBLE);
+
+ if ((!data) || (data > (u32)(MAX_SCHEDULE_TIMEOUT / HZ)))
+ data = (u32)(MAX_SCHEDULE_TIMEOUT / HZ);
+
+ schedule_timeout(data * HZ);
+ del_timer_sync(&lp->blink_timer);
+
+ /* Restore the original value of the bcrs */
+ spin_lock_irqsave(&lp->lock, flags);
+ for (i=4; i<8; i++) {
+ a->write_bcr(ioaddr, i, regs[i-4]);
+ }
+ spin_unlock_irqrestore(&lp->lock, flags);
+
+ return 0;
+}
+
+static int pcnet32_get_regs_len(struct net_device *dev)
+{
+ return(PCNET32_NUM_REGS * sizeof(u16));
+}
+
+static void pcnet32_get_regs(struct net_device *dev, struct ethtool_regs *regs,
+ void *ptr)
+{
+ int i, csr0;
+ u16 *buff = ptr;
+ struct pcnet32_private *lp = dev->priv;
+ struct pcnet32_access *a = &lp->a;
+ ulong ioaddr = dev->base_addr;
+ int ticks;
+ unsigned long flags;
+
+ spin_lock_irqsave(&lp->lock, flags);
+
+ csr0 = a->read_csr(ioaddr, 0);
+ if (!(csr0 & 0x0004)) { /* If not stopped */
+ /* set SUSPEND (SPND) - CSR5 bit 0 */
+ a->write_csr(ioaddr, 5, 0x0001);
+
+ /* poll waiting for bit to be set */
+ ticks = 0;
+ while (!(a->read_csr(ioaddr, 5) & 0x0001)) {
+ spin_unlock_irqrestore(&lp->lock, flags);
+ mdelay(1);
+ spin_lock_irqsave(&lp->lock, flags);
+ ticks++;
+ if (ticks > 200) {
+ if (netif_msg_hw(lp))
+ printk(KERN_DEBUG "%s: Error getting into suspend!\n",
+ dev->name);
+ break;
+ }
+ }
+ }
+
+ /* read address PROM */
+ for (i=0; i<16; i += 2)
+ *buff++ = inw(ioaddr + i);
+
+ /* read control and status registers */
+ for (i=0; i<90; i++) {
+ *buff++ = a->read_csr(ioaddr, i);
+ }
+
+ *buff++ = a->read_csr(ioaddr, 112);
+ *buff++ = a->read_csr(ioaddr, 114);
+
+ /* read bus configuration registers */
+ for (i=0; i<36; i++) {
+ *buff++ = a->read_bcr(ioaddr, i);
+ }
+
+ /* read mii phy registers */
+ if (lp->mii) {
+ for (i=0; i<32; i++) {
+ lp->a.write_bcr(ioaddr, 33, ((lp->mii_if.phy_id) << 5) | i);
+ *buff++ = lp->a.read_bcr(ioaddr, 34);
+ }
+ }
+
+ if (!(csr0 & 0x0004)) { /* If not stopped */
+ /* clear SUSPEND (SPND) - CSR5 bit 0 */
+ a->write_csr(ioaddr, 5, 0x0000);
+ }
+
+ i = buff - (u16 *)ptr;
+ for (; i < PCNET32_NUM_REGS; i++)
+ *buff++ = 0;
+
+ spin_unlock_irqrestore(&lp->lock, flags);
+}
+
static struct ethtool_ops pcnet32_ethtool_ops = {
.get_settings = pcnet32_get_settings,
.set_settings = pcnet32_set_settings,
@@ -742,22 +939,28 @@
.get_strings = pcnet32_get_strings,
.self_test_count = pcnet32_self_test_count,
.self_test = pcnet32_ethtool_test,
+ .phys_id = pcnet32_phys_id,
+ .get_regs_len = pcnet32_get_regs_len,
+ .get_regs = pcnet32_get_regs,
};
-/* only probes for non-PCI devices, the rest are handled by
+/* only probes for non-PCI devices, the rest are handled by
* pci_register_driver via pcnet32_probe_pci */
static void __devinit
pcnet32_probe_vlbus(void)
{
unsigned int *port, ioaddr;
-
+
/* search for PCnet32 VLB cards at known addresses */
for (port = pcnet32_portlist; (ioaddr = *port); port++) {
- if (!check_region(ioaddr, PCNET32_TOTAL_SIZE)) {
+ if (request_region(ioaddr, PCNET32_TOTAL_SIZE, "pcnet32_probe_vlbus")) {
/* check if there is really a pcnet chip on that ioaddr */
- if ((inb(ioaddr + 14) == 0x57) && (inb(ioaddr + 15) == 0x57))
+ if ((inb(ioaddr + 14) == 0x57) && (inb(ioaddr + 15) == 0x57)) {
pcnet32_probe1(ioaddr, 0, 0, NULL);
+ } else {
+ release_region(ioaddr, PCNET32_TOTAL_SIZE);
+ }
}
}
}
@@ -771,28 +974,36 @@
err = pci_enable_device(pdev);
if (err < 0) {
- printk(KERN_ERR PFX "failed to enable device -- err=%d\n", err);
+ if (pcnet32_debug & NETIF_MSG_PROBE)
+ printk(KERN_ERR PFX "failed to enable device -- err=%d\n", err);
return err;
}
pci_set_master(pdev);
ioaddr = pci_resource_start (pdev, 0);
if (!ioaddr) {
- printk (KERN_ERR PFX "card has no PCI IO resources, aborting\n");
- return -ENODEV;
+ if (pcnet32_debug & NETIF_MSG_PROBE)
+ printk (KERN_ERR PFX "card has no PCI IO resources, aborting\n");
+ return -ENODEV;
}
-
+
if (!pci_dma_supported(pdev, PCNET32_DMA_MASK)) {
- printk(KERN_ERR PFX "architecture does not support 32bit PCI busmaster DMA\n");
+ if (pcnet32_debug & NETIF_MSG_PROBE)
+ printk(KERN_ERR PFX "architecture does not support 32bit PCI busmaster DMA\n");
return -ENODEV;
}
+ if (request_region(ioaddr, PCNET32_TOTAL_SIZE, "pcnet32_probe_pci") == NULL) {
+ if (pcnet32_debug & NETIF_MSG_PROBE)
+ printk(KERN_ERR PFX "io address range already allocated\n");
+ return -EBUSY;
+ }
return pcnet32_probe1(ioaddr, pdev->irq, 1, pdev);
}
-/* pcnet32_probe1
- * Called from both pcnet32_probe_vlbus and pcnet_probe_pci.
+/* pcnet32_probe1
+ * Called from both pcnet32_probe_vlbus and pcnet_probe_pci.
* pdev will be NULL when called from pcnet32_probe_vlbus.
*/
static int __devinit
@@ -802,12 +1013,13 @@
struct pcnet32_private *lp;
dma_addr_t lp_dma_addr;
int i, media;
- int fdx, mii, fset, dxsuflo, ltint;
+ int fdx, mii, fset, dxsuflo;
int chip_version;
char *chipname;
struct net_device *dev;
struct pcnet32_access *a = NULL;
u8 promaddr[6];
+ int ret = -ENODEV;
/* reset the chip */
pcnet32_wio_reset(ioaddr);
@@ -820,19 +1032,20 @@
if (pcnet32_dwio_read_csr(ioaddr, 0) == 4 && pcnet32_dwio_check(ioaddr)) {
a = &pcnet32_dwio;
} else
- return -ENODEV;
+ goto err_release_region;
}
chip_version = a->read_csr(ioaddr, 88) | (a->read_csr(ioaddr,89) << 16);
- if (pcnet32_debug & NETIF_MSG_PROBE)
+ if ((pcnet32_debug & NETIF_MSG_PROBE) && (pcnet32_debug & NETIF_MSG_HW))
printk(KERN_INFO " PCnet chip version is %#x.\n", chip_version);
if ((chip_version & 0xfff) != 0x003) {
- printk(KERN_INFO PFX "Unsupported chip version.\n");
- return -ENODEV;
+ if (pcnet32_debug & NETIF_MSG_PROBE)
+ printk(KERN_INFO PFX "Unsupported chip version.\n");
+ goto err_release_region;
}
-
+
/* initialize variables */
- fdx = mii = fset = dxsuflo = ltint = 0;
+ fdx = mii = fset = dxsuflo = 0;
chip_version = (chip_version >> 12) & 0xffff;
switch (chip_version) {
@@ -852,7 +1065,6 @@
case 0x2623:
chipname = "PCnet/FAST 79C971"; /* PCI */
fdx = 1; mii = 1; fset = 1;
- ltint = 1;
break;
case 0x2624:
chipname = "PCnet/FAST+ 79C972"; /* PCI */
@@ -865,7 +1077,7 @@
case 0x2626:
chipname = "PCnet/Home 79C978"; /* PCI */
fdx = 1;
- /*
+ /*
* This is based on specs published at www.amd.com. This section
* assumes that a card with a 79C978 wants to go into 1Mb HomePNA
* mode. The 79C978 can also go into standard ethernet, and there
@@ -874,12 +1086,6 @@
*/
/* switch to home wiring mode */
media = a->read_bcr(ioaddr, 49);
-#if 0
- if (pcnet32_debug > 2)
- printk(KERN_DEBUG PFX "media value %#x.\n", media);
- media &= ~3;
- media |= 1;
-#endif
if (pcnet32_debug & NETIF_MSG_PROBE)
printk(KERN_DEBUG PFX "media reset to %#x.\n", media);
a->write_bcr(ioaddr, 49, media);
@@ -888,34 +1094,42 @@
chipname = "PCnet/FAST III 79C975"; /* PCI */
fdx = 1; mii = 1;
break;
+ case 0x2628:
+ chipname = "PCnet/PRO 79C976";
+ fdx = 1; mii = 1;
+ break;
default:
- printk(KERN_INFO PFX "PCnet version %#x, no PCnet32 chip.\n",
- chip_version);
- return -ENODEV;
+ if (pcnet32_debug & NETIF_MSG_PROBE)
+ printk(KERN_INFO PFX "PCnet version %#x, no PCnet32 chip.\n",
+ chip_version);
+ goto err_release_region;
}
/*
* On selected chips turn on the BCR18:NOUFLO bit. This stops transmit
* starting until the packet is loaded. Strike one for reliability, lose
- * one for latency - although on PCI this isnt a big loss. Older chips
+ * one for latency - although on PCI this isnt a big loss. Older chips
* have FIFO's smaller than a packet, so you can't do this.
+ * Turn on BCR18:BurstRdEn and BCR18:BurstWrEn.
*/
-
- if(fset)
- {
- a->write_bcr(ioaddr, 18, (a->read_bcr(ioaddr, 18) | 0x0800));
+
+ if (fset) {
+ a->write_bcr(ioaddr, 18, (a->read_bcr(ioaddr, 18) | 0x0860));
a->write_csr(ioaddr, 80, (a->read_csr(ioaddr, 80) & 0x0C00) | 0x0c00);
dxsuflo = 1;
- ltint = 1;
}
-
+
dev = alloc_etherdev(0);
if (!dev) {
- printk(KERN_ERR PFX "Memory allocation failed.\n");
- return -ENOMEM;
+ if (pcnet32_debug & NETIF_MSG_PROBE)
+ printk(KERN_ERR PFX "Memory allocation failed.\n");
+ ret = -ENOMEM;
+ goto err_release_region;
}
+ SET_NETDEV_DEV(dev, &pdev->dev);
- printk(KERN_INFO PFX "%s at %#3lx,", chipname, ioaddr);
+ if (pcnet32_debug & NETIF_MSG_PROBE)
+ printk(KERN_INFO PFX "%s at %#3lx,", chipname, ioaddr);
/* In most chips, after a chip reset, the ethernet address is read from the
* station address PROM at the base address and programmed into the
@@ -935,60 +1149,63 @@
/* read PROM address and compare with CSR address */
for (i = 0; i < 6; i++)
promaddr[i] = inb(ioaddr + i);
-
- if( memcmp( promaddr, dev->dev_addr, 6)
- || !is_valid_ether_addr(dev->dev_addr) ) {
+
+ if (memcmp(promaddr, dev->dev_addr, 6)
+ || !is_valid_ether_addr(dev->dev_addr)) {
#ifndef __powerpc__
- if( is_valid_ether_addr(promaddr) ){
+ if (is_valid_ether_addr(promaddr)) {
#else
- if( !is_valid_ether_addr(dev->dev_addr)
+ if (!is_valid_ether_addr(dev->dev_addr)
&& is_valid_ether_addr(promaddr)) {
#endif
- printk(" warning: CSR address invalid,\n");
- printk(KERN_INFO " using instead PROM address of");
+ if (pcnet32_debug & NETIF_MSG_PROBE) {
+ printk(" warning: CSR address invalid,\n");
+ printk(KERN_INFO " using instead PROM address of");
+ }
memcpy(dev->dev_addr, promaddr, 6);
}
}
/* if the ethernet address is not valid, force to 00:00:00:00:00:00 */
- if( !is_valid_ether_addr(dev->dev_addr) )
+ if (!is_valid_ether_addr(dev->dev_addr))
memset(dev->dev_addr, 0, sizeof(dev->dev_addr));
- for (i = 0; i < 6; i++)
- printk(" %2.2x", dev->dev_addr[i] );
-
- if (((chip_version + 1) & 0xfffe) == 0x2624) { /* Version 0x2623 or 0x2624 */
- i = a->read_csr(ioaddr, 80) & 0x0C00; /* Check tx_start_pt */
- printk("\n" KERN_INFO " tx_start_pt(0x%04x):",i);
- switch(i>>10) {
- case 0: printk(" 20 bytes,"); break;
- case 1: printk(" 64 bytes,"); break;
- case 2: printk(" 128 bytes,"); break;
- case 3: printk("~220 bytes,"); break;
- }
- i = a->read_bcr(ioaddr, 18); /* Check Burst/Bus control */
- printk(" BCR18(%x):",i&0xffff);
- if (i & (1<<5)) printk("BurstWrEn ");
- if (i & (1<<6)) printk("BurstRdEn ");
- if (i & (1<<7)) printk("DWordIO ");
- if (i & (1<<11)) printk("NoUFlow ");
- i = a->read_bcr(ioaddr, 25);
- printk("\n" KERN_INFO " SRAMSIZE=0x%04x,",i<<8);
- i = a->read_bcr(ioaddr, 26);
- printk(" SRAM_BND=0x%04x,",i<<8);
- i = a->read_bcr(ioaddr, 27);
- if (i & (1<<14)) printk("LowLatRx");
+ if (pcnet32_debug & NETIF_MSG_PROBE) {
+ for (i = 0; i < 6; i++)
+ printk(" %2.2x", dev->dev_addr[i]);
+
+ /* Version 0x2623 - 0x2624 */
+ if (((chip_version + 1) & 0xfffe) == 0x2624) {
+ i = a->read_csr(ioaddr, 80) & 0x0C00; /* Check tx_start_pt */
+ printk("\n" KERN_INFO " tx_start_pt(0x%04x):",i);
+ switch(i>>10) {
+ case 0: printk(" 20 bytes,"); break;
+ case 1: printk(" 64 bytes,"); break;
+ case 2: printk(" 128 bytes,"); break;
+ case 3: printk("~220 bytes,"); break;
+ }
+ i = a->read_bcr(ioaddr, 18); /* Check Burst/Bus control */
+ printk(" BCR18(%x):",i&0xffff);
+ if (i & (1<<5)) printk("BurstWrEn ");
+ if (i & (1<<6)) printk("BurstRdEn ");
+ if (i & (1<<7)) printk("DWordIO ");
+ if (i & (1<<11)) printk("NoUFlow ");
+ i = a->read_bcr(ioaddr, 25);
+ printk("\n" KERN_INFO " SRAMSIZE=0x%04x,",i<<8);
+ i = a->read_bcr(ioaddr, 26);
+ printk(" SRAM_BND=0x%04x,",i<<8);
+ i = a->read_bcr(ioaddr, 27);
+ if (i & (1<<14)) printk("LowLatRx");
+ }
}
dev->base_addr = ioaddr;
- if (request_region(ioaddr, PCNET32_TOTAL_SIZE, chipname) == NULL)
- return -EBUSY;
-
/* pci_alloc_consistent returns page-aligned memory, so we do not have to check the alignment */
if ((lp = pci_alloc_consistent(pdev, sizeof(*lp), &lp_dma_addr)) == NULL) {
- printk(KERN_ERR PFX "Consistent memory allocation failed.\n");
- release_region(ioaddr, PCNET32_TOTAL_SIZE);
- return -ENOMEM;
+ if (pcnet32_debug & NETIF_MSG_PROBE)
+ printk(KERN_ERR PFX "Consistent memory allocation failed.\n");
+ ret = -ENOMEM;
+ goto err_free_netdev;
}
memset(lp, 0, sizeof(*lp));
@@ -996,7 +1213,9 @@
lp->pci_dev = pdev;
spin_lock_init(&lp->lock);
-
+
+ SET_MODULE_OWNER(dev);
+ SET_NETDEV_DEV(dev, &pdev->dev);
dev->priv = lp;
lp->name = chipname;
lp->shared_irq = shared;
@@ -1004,7 +1223,6 @@
lp->mii_if.phy_id_mask = 0x1f;
lp->mii_if.reg_num_mask = 0x1f;
lp->dxsuflo = dxsuflo;
- lp->ltint = ltint;
lp->mii = mii;
lp->msg_enable = pcnet32_debug;
if ((cards_found >= MAX_UNITS) || (options[cards_found] > sizeof(options_mapping)))
@@ -1014,47 +1232,53 @@
lp->mii_if.dev = dev;
lp->mii_if.mdio_read = mdio_read;
lp->mii_if.mdio_write = mdio_write;
-
- if (fdx && !(lp->options & PCNET32_PORT_ASEL) &&
+
+ if (fdx && !(lp->options & PCNET32_PORT_ASEL) &&
((cards_found>=MAX_UNITS) || full_duplex[cards_found]))
lp->options |= PCNET32_PORT_FD;
-
+
if (!a) {
- printk(KERN_ERR PFX "No access methods\n");
- pci_free_consistent(lp->pci_dev, sizeof(*lp), lp, lp->dma_addr);
- release_region(ioaddr, PCNET32_TOTAL_SIZE);
- return -ENODEV;
+ if (pcnet32_debug & NETIF_MSG_PROBE)
+ printk(KERN_ERR PFX "No access methods\n");
+ ret = -ENODEV;
+ goto err_free_consistent;
}
lp->a = *a;
-
+
/* detect special T1/E1 WAN card by checking for MAC address */
- if (dev->dev_addr[0] == 0x00 && dev->dev_addr[1] == 0xe0 && dev->dev_addr[2] == 0x75)
+ if (dev->dev_addr[0] == 0x00 && dev->dev_addr[1] == 0xe0
+ && dev->dev_addr[2] == 0x75)
lp->options = PCNET32_PORT_FD | PCNET32_PORT_GPSI;
lp->init_block.mode = le16_to_cpu(0x0003); /* Disable Rx and Tx. */
- lp->init_block.tlen_rlen = le16_to_cpu(TX_RING_LEN_BITS | RX_RING_LEN_BITS);
+ lp->init_block.tlen_rlen = le16_to_cpu(TX_RING_LEN_BITS | RX_RING_LEN_BITS);
for (i = 0; i < 6; i++)
lp->init_block.phys_addr[i] = dev->dev_addr[i];
lp->init_block.filter[0] = 0x00000000;
lp->init_block.filter[1] = 0x00000000;
- lp->init_block.rx_ring = (u32)le32_to_cpu(lp->dma_addr + offsetof(struct pcnet32_private, rx_ring));
- lp->init_block.tx_ring = (u32)le32_to_cpu(lp->dma_addr + offsetof(struct pcnet32_private, tx_ring));
-
+ lp->init_block.rx_ring = (u32)le32_to_cpu(lp->dma_addr +
+ offsetof(struct pcnet32_private, rx_ring));
+ lp->init_block.tx_ring = (u32)le32_to_cpu(lp->dma_addr +
+ offsetof(struct pcnet32_private, tx_ring));
+
/* switch pcnet32 to 32bit mode */
- a->write_bcr (ioaddr, 20, 2);
+ a->write_bcr(ioaddr, 20, 2);
+
+ a->write_csr(ioaddr, 1, (lp->dma_addr + offsetof(struct pcnet32_private,
+ init_block)) & 0xffff);
+ a->write_csr(ioaddr, 2, (lp->dma_addr + offsetof(struct pcnet32_private,
+ init_block)) >> 16);
- a->write_csr (ioaddr, 1, (lp->dma_addr + offsetof(struct pcnet32_private, init_block)) & 0xffff);
- a->write_csr (ioaddr, 2, (lp->dma_addr + offsetof(struct pcnet32_private, init_block)) >> 16);
-
if (irq_line) {
dev->irq = irq_line;
}
-
- if (dev->irq >= 2)
- printk(" assigned IRQ %d.\n", dev->irq);
- else {
+
+ if (dev->irq >= 2) {
+ if (pcnet32_debug & NETIF_MSG_PROBE)
+ printk(" assigned IRQ %d.\n", dev->irq);
+ } else {
unsigned long irq_mask = probe_irq_on();
-
+
/*
* To auto-IRQ we enable the initialization-done and DMA error
* interrupts. For ISA boards we get a DMA error, but VLB and PCI
@@ -1063,22 +1287,26 @@
/* Trigger an initialization just for the interrupt. */
a->write_csr (ioaddr, 0, 0x41);
mdelay (1);
-
+
dev->irq = probe_irq_off (irq_mask);
- if (dev->irq)
- printk(", probed IRQ %d.\n", dev->irq);
- else {
- printk(", failed to detect IRQ line.\n");
- pci_free_consistent(lp->pci_dev, sizeof(*lp), lp, lp->dma_addr);
- release_region(ioaddr, PCNET32_TOTAL_SIZE);
- return -ENODEV;
+ if (!dev->irq) {
+ if (pcnet32_debug & NETIF_MSG_PROBE)
+ printk(", failed to detect IRQ line.\n");
+ ret = -ENODEV;
+ goto err_free_consistent;
}
+ if (pcnet32_debug & NETIF_MSG_PROBE)
+ printk(", probed IRQ %d.\n", dev->irq);
}
/* Set the mii phy_id so that we can query the link state */
if (lp->mii)
lp->mii_if.phy_id = ((lp->a.read_bcr (ioaddr, 33)) >> 5) & 0x1f;
-
+
+ init_timer (&lp->watchdog_timer);
+ lp->watchdog_timer.data = (unsigned long) dev;
+ lp->watchdog_timer.function = (void *) &pcnet32_watchdog;
+
/* The PCNET32-specific entries in the device structure. */
dev->open = &pcnet32_open;
dev->hard_start_xmit = &pcnet32_start_xmit;
@@ -1090,6 +1318,14 @@
dev->tx_timeout = pcnet32_tx_timeout;
dev->watchdog_timeo = (5*HZ);
+#ifdef CONFIG_NET_POLL_CONTROLLER
+ dev->poll_controller = pcnet32_poll_controller;
+#endif
+
+ /* Fill in the generic fields of the device structure. */
+ if (register_netdev(dev))
+ goto err_free_consistent;
+
if (pdev) {
pci_set_drvdata(pdev, dev);
} else {
@@ -1097,11 +1333,21 @@
pcnet32_dev = dev;
}
- /* Fill in the generic fields of the device structure. */
- register_netdev(dev);
- printk(KERN_INFO "%s: registered as %s\n",dev->name, lp->name);
+ if (pcnet32_debug & NETIF_MSG_PROBE)
+ printk(KERN_INFO "%s: registered as %s\n", dev->name, lp->name);
cards_found++;
+
+ a->write_bcr(ioaddr, 2, 0x1002); /* enable LED writes */
+
return 0;
+
+err_free_consistent:
+ pci_free_consistent(lp->pci_dev, sizeof(*lp), lp, lp->dma_addr);
+err_free_netdev:
+ free_netdev(dev);
+err_release_region:
+ release_region(ioaddr, PCNET32_TOTAL_SIZE);
+ return ret;
}
@@ -1113,13 +1359,15 @@
u16 val;
int i;
int rc;
+ unsigned long flags;
if (dev->irq == 0 ||
request_irq(dev->irq, &pcnet32_interrupt,
- lp->shared_irq ? SA_SHIRQ : 0, lp->name, (void *)dev)) {
+ lp->shared_irq ? SA_SHIRQ : 0, dev->name, (void *)dev)) {
return -EAGAIN;
}
+ spin_lock_irqsave(&lp->lock, flags);
/* Check for a valid station address */
if (!is_valid_ether_addr(dev->dev_addr)) {
rc = -EINVAL;
@@ -1138,13 +1386,13 @@
(u32) (lp->dma_addr + offsetof(struct pcnet32_private, tx_ring)),
(u32) (lp->dma_addr + offsetof(struct pcnet32_private, rx_ring)),
(u32) (lp->dma_addr + offsetof(struct pcnet32_private, init_block)));
-
+
/* set/reset autoselect bit */
val = lp->a.read_bcr (ioaddr, 2) & ~2;
if (lp->options & PCNET32_PORT_ASEL)
val |= 2;
lp->a.write_bcr (ioaddr, 2, val);
-
+
/* handle full duplex setting */
if (lp->mii_if.full_duplex) {
val = lp->a.read_bcr (ioaddr, 9) & ~3;
@@ -1154,34 +1402,38 @@
val |= 2;
} else if (lp->options & PCNET32_PORT_ASEL) {
/* workaround of xSeries250, turn on for 79C975 only */
- i = ((lp->a.read_csr(ioaddr, 88) | (lp->a.read_csr(ioaddr,89) << 16)) >> 12) & 0xffff;
- if (i == 0x2627) val |= 3;
+ i = ((lp->a.read_csr(ioaddr, 88) |
+ (lp->a.read_csr(ioaddr,89) << 16)) >> 12) & 0xffff;
+ if (i == 0x2627)
+ val |= 3;
}
lp->a.write_bcr (ioaddr, 9, val);
}
-
+
/* set/reset GPSI bit in test register */
val = lp->a.read_csr (ioaddr, 124) & ~0x10;
if ((lp->options & PCNET32_PORT_PORTSEL) == PCNET32_PORT_GPSI)
val |= 0x10;
lp->a.write_csr (ioaddr, 124, val);
-
+
if (lp->mii && !(lp->options & PCNET32_PORT_ASEL)) {
- val = lp->a.read_bcr (ioaddr, 32) & ~0x38; /* disable Auto Negotiation, set 10Mpbs, HD */
+ /* disable Auto Negotiation, set 10Mpbs, HD */
+ val = lp->a.read_bcr (ioaddr, 32) & ~0x38;
if (lp->options & PCNET32_PORT_FD)
val |= 0x10;
if (lp->options & PCNET32_PORT_100)
val |= 0x08;
lp->a.write_bcr (ioaddr, 32, val);
} else {
- if (lp->options & PCNET32_PORT_ASEL) { /* enable auto negotiate, setup, disable fd */
- val = lp->a.read_bcr(ioaddr, 32) & ~0x98;
- val |= 0x20;
- lp->a.write_bcr(ioaddr, 32, val);
+ if (lp->options & PCNET32_PORT_ASEL) {
+ /* enable auto negotiate, setup, disable fd */
+ val = lp->a.read_bcr(ioaddr, 32) & ~0x98;
+ val |= 0x20;
+ lp->a.write_bcr(ioaddr, 32, val);
}
}
-#ifdef DO_DXSUFLO
+#ifdef DO_DXSUFLO
if (lp->dxsuflo) { /* Disable transmit stop on underflow */
val = lp->a.read_csr (ioaddr, 3);
val |= 0x40;
@@ -1189,34 +1441,36 @@
}
#endif
- if (lp->ltint) { /* Enable TxDone-intr inhibitor */
- val = lp->a.read_csr (ioaddr, 5);
- val |= (1<<14);
- lp->a.write_csr (ioaddr, 5, val);
- }
-
lp->init_block.mode = le16_to_cpu((lp->options & PCNET32_PORT_PORTSEL) << 7);
- lp->init_block.filter[0] = 0x00000000;
- lp->init_block.filter[1] = 0x00000000;
+ pcnet32_load_multicast(dev);
+
if (pcnet32_init_ring(dev)) {
rc = -ENOMEM;
goto err_free_ring;
}
-
+
/* Re-initialize the PCNET32, and start it when done. */
- lp->a.write_csr (ioaddr, 1, (lp->dma_addr + offsetof(struct pcnet32_private, init_block)) &0xffff);
- lp->a.write_csr (ioaddr, 2, (lp->dma_addr + offsetof(struct pcnet32_private, init_block)) >> 16);
+ lp->a.write_csr (ioaddr, 1, (lp->dma_addr +
+ offsetof(struct pcnet32_private, init_block)) &0xffff);
+ lp->a.write_csr (ioaddr, 2, (lp->dma_addr +
+ offsetof(struct pcnet32_private, init_block)) >> 16);
lp->a.write_csr (ioaddr, 4, 0x0915);
lp->a.write_csr (ioaddr, 0, 0x0001);
netif_start_queue(dev);
+ /* If we have mii, print the link status and start the watchdog */
+ if (lp->mii) {
+ mii_check_media (&lp->mii_if, netif_msg_link(lp), 1);
+ mod_timer (&(lp->watchdog_timer), PCNET32_WATCHDOG_TIMEOUT);
+ }
+
i = 0;
while (i++ < 100)
if (lp->a.read_csr (ioaddr, 0) & 0x0100)
break;
- /*
+ /*
* We used to clear the InitDone bit, 0x0100, here but Mark Stockton
* reports that doing so triggers a bug in the '974.
*/
@@ -1224,33 +1478,34 @@
if (netif_msg_ifup(lp))
printk(KERN_DEBUG "%s: pcnet32 open after %d ticks, init block %#x csr0 %4.4x.\n",
- dev->name, i, (u32) (lp->dma_addr + offsetof(struct pcnet32_private, init_block)),
- lp->a.read_csr(ioaddr, 0));
+ dev->name, i, (u32) (lp->dma_addr +
+ offsetof(struct pcnet32_private, init_block)),
+ lp->a.read_csr(ioaddr, 0));
+ spin_unlock_irqrestore(&lp->lock, flags);
- MOD_INC_USE_COUNT;
-
return 0; /* Always succeed */
err_free_ring:
/* free any allocated skbuffs */
for (i = 0; i < RX_RING_SIZE; i++) {
- lp->rx_ring[i].status = 0;
+ lp->rx_ring[i].status = 0;
if (lp->rx_skbuff[i]) {
- pci_unmap_single(lp->pci_dev, lp->rx_dma_addr[i], PKT_BUF_SZ-2,
+ pci_unmap_single(lp->pci_dev, lp->rx_dma_addr[i], PKT_BUF_SZ-2,
PCI_DMA_FROMDEVICE);
dev_kfree_skb(lp->rx_skbuff[i]);
- }
+ }
lp->rx_skbuff[i] = NULL;
- lp->rx_dma_addr[i] = 0;
+ lp->rx_dma_addr[i] = 0;
}
/*
- * Switch back to 16bit mode to avoid problems with dumb
+ * Switch back to 16bit mode to avoid problems with dumb
* DOS packet driver after a warm reboot
*/
lp->a.write_bcr (ioaddr, 20, 4);
err_free_irq:
+ spin_unlock_irqrestore(&lp->lock, flags);
free_irq(dev->irq, dev);
return rc;
}
@@ -1268,7 +1523,7 @@
* restarting the chip, but I'm too lazy to do so right now. dplatt@3do.com
*/
-static void
+static void
pcnet32_purge_tx_ring(struct net_device *dev)
{
struct pcnet32_private *lp = dev->priv;
@@ -1276,10 +1531,11 @@
for (i = 0; i < TX_RING_SIZE; i++) {
if (lp->tx_skbuff[i]) {
- pci_unmap_single(lp->pci_dev, lp->tx_dma_addr[i], lp->tx_skbuff[i]->len, PCI_DMA_TODEVICE);
- dev_kfree_skb_any(lp->tx_skbuff[i]);
+ pci_unmap_single(lp->pci_dev, lp->tx_dma_addr[i],
+ lp->tx_skbuff[i]->len, PCI_DMA_TODEVICE);
+ dev_kfree_skb_any(lp->tx_skbuff[i]);
lp->tx_skbuff[i] = NULL;
- lp->tx_dma_addr[i] = 0;
+ lp->tx_dma_addr[i] = 0;
}
}
}
@@ -1297,37 +1553,41 @@
lp->dirty_rx = lp->dirty_tx = 0;
for (i = 0; i < RX_RING_SIZE; i++) {
- struct sk_buff *rx_skbuff = lp->rx_skbuff[i];
+ struct sk_buff *rx_skbuff = lp->rx_skbuff[i];
if (rx_skbuff == NULL) {
if (!(rx_skbuff = lp->rx_skbuff[i] = dev_alloc_skb (PKT_BUF_SZ))) {
/* there is not much, we can do at this point */
- printk(KERN_ERR "%s: pcnet32_init_ring dev_alloc_skb failed.\n",dev->name);
+ if (pcnet32_debug & NETIF_MSG_DRV)
+ printk(KERN_ERR "%s: pcnet32_init_ring dev_alloc_skb failed.\n",
+ dev->name);
return -1;
}
skb_reserve (rx_skbuff, 2);
}
- if (lp->rx_dma_addr[i] == 0)
- lp->rx_dma_addr[i] = pci_map_single(lp->pci_dev,
- rx_skbuff->tail, PKT_BUF_SZ-2, PCI_DMA_FROMDEVICE);
+ if (lp->rx_dma_addr[i] == 0)
+ lp->rx_dma_addr[i] = pci_map_single(lp->pci_dev, rx_skbuff->tail,
+ PKT_BUF_SZ-2, PCI_DMA_FROMDEVICE);
lp->rx_ring[i].base = (u32)le32_to_cpu(lp->rx_dma_addr[i]);
lp->rx_ring[i].buf_length = le16_to_cpu(2-PKT_BUF_SZ);
lp->rx_ring[i].status = le16_to_cpu(0x8000);
}
/* The Tx buffer address is filled in as needed, but we do need to clear
- the upper ownership bit. */
+ * the upper ownership bit. */
for (i = 0; i < TX_RING_SIZE; i++) {
lp->tx_ring[i].base = 0;
lp->tx_ring[i].status = 0;
- lp->tx_dma_addr[i] = 0;
+ lp->tx_dma_addr[i] = 0;
}
wmb(); /* Make sure all changes are visible */
lp->init_block.tlen_rlen = le16_to_cpu(TX_RING_LEN_BITS | RX_RING_LEN_BITS);
for (i = 0; i < 6; i++)
lp->init_block.phys_addr[i] = dev->dev_addr[i];
- lp->init_block.rx_ring = (u32)le32_to_cpu(lp->dma_addr + offsetof(struct pcnet32_private, rx_ring));
- lp->init_block.tx_ring = (u32)le32_to_cpu(lp->dma_addr + offsetof(struct pcnet32_private, tx_ring));
+ lp->init_block.rx_ring = (u32)le32_to_cpu(lp->dma_addr +
+ offsetof(struct pcnet32_private, rx_ring));
+ lp->init_block.tx_ring = (u32)le32_to_cpu(lp->dma_addr +
+ offsetof(struct pcnet32_private, tx_ring));
return 0;
}
@@ -1337,11 +1597,11 @@
struct pcnet32_private *lp = dev->priv;
unsigned long ioaddr = dev->base_addr;
int i;
-
+
pcnet32_purge_tx_ring(dev);
if (pcnet32_init_ring(dev))
return;
-
+
/* ReInit Ring */
lp->a.write_csr (ioaddr, 0, 1);
i = 0;
@@ -1361,31 +1621,36 @@
spin_lock_irqsave(&lp->lock, flags);
/* Transmitter timeout, serious problems. */
+ if (pcnet32_debug & NETIF_MSG_DRV)
printk(KERN_ERR "%s: transmit timed out, status %4.4x, resetting.\n",
- dev->name, lp->a.read_csr(ioaddr, 0));
- lp->a.write_csr (ioaddr, 0, 0x0004);
- lp->stats.tx_errors++;
- if (netif_msg_tx_err(lp)) {
- int i;
- printk(KERN_DEBUG " Ring data dump: dirty_tx %d cur_tx %d%s cur_rx %d.",
- lp->dirty_tx, lp->cur_tx, lp->tx_full ? " (full)" : "",
- lp->cur_rx);
- for (i = 0 ; i < RX_RING_SIZE; i++)
- printk("%s %08x %04x %08x %04x", i & 1 ? "" : "\n ",
- lp->rx_ring[i].base, -lp->rx_ring[i].buf_length,
- lp->rx_ring[i].msg_length, (unsigned)lp->rx_ring[i].status);
- for (i = 0 ; i < TX_RING_SIZE; i++)
- printk("%s %08x %04x %08x %04x", i & 1 ? "" : "\n ",
- lp->tx_ring[i].base, -lp->tx_ring[i].length,
- lp->tx_ring[i].misc, (unsigned)lp->tx_ring[i].status);
- printk("\n");
- }
- pcnet32_restart(dev, 0x0042);
+ dev->name, lp->a.read_csr(ioaddr, 0));
+ lp->a.write_csr (ioaddr, 0, 0x0004);
+ lp->stats.tx_errors++;
+ if (netif_msg_tx_err(lp)) {
+ int i;
+ printk(KERN_DEBUG " Ring data dump: dirty_tx %d cur_tx %d%s cur_rx %d.",
+ lp->dirty_tx, lp->cur_tx, lp->tx_full ? " (full)" : "",
+ lp->cur_rx);
+ for (i = 0 ; i < RX_RING_SIZE; i++)
+ printk("%s %08x %04x %08x %04x", i & 1 ? "" : "\n ",
+ le32_to_cpu(lp->rx_ring[i].base),
+ (-le16_to_cpu(lp->rx_ring[i].buf_length)) & 0xffff,
+ le32_to_cpu(lp->rx_ring[i].msg_length),
+ le16_to_cpu(lp->rx_ring[i].status));
+ for (i = 0 ; i < TX_RING_SIZE; i++)
+ printk("%s %08x %04x %08x %04x", i & 1 ? "" : "\n ",
+ le32_to_cpu(lp->tx_ring[i].base),
+ (-le16_to_cpu(lp->tx_ring[i].length)) & 0xffff,
+ le32_to_cpu(lp->tx_ring[i].misc),
+ le16_to_cpu(lp->tx_ring[i].status));
+ printk("\n");
+ }
+ pcnet32_restart(dev, 0x0042);
- dev->trans_start = jiffies;
- netif_wake_queue(dev);
+ dev->trans_start = jiffies;
+ netif_wake_queue(dev);
- spin_unlock_irqrestore(&lp->lock, flags);
+ spin_unlock_irqrestore(&lp->lock, flags);
}
@@ -1398,45 +1663,33 @@
int entry;
unsigned long flags;
+ spin_lock_irqsave(&lp->lock, flags);
+
if (netif_msg_tx_queued(lp)) {
printk(KERN_DEBUG "%s: pcnet32_start_xmit() called, csr0 %4.4x.\n",
dev->name, lp->a.read_csr(ioaddr, 0));
}
- spin_lock_irqsave(&lp->lock, flags);
-
/* Default status -- will not enable Successful-TxDone
* interrupt when that option is available to us.
*/
status = 0x8300;
- entry = (lp->cur_tx - lp->dirty_tx) & TX_RING_MOD_MASK;
- if ((lp->ltint) &&
- ((entry == TX_RING_SIZE/3) ||
- (entry == (TX_RING_SIZE*2)/3) ||
- (entry >= TX_RING_SIZE-2)))
- {
- /* Enable Successful-TxDone interrupt if we have
- * 1/3, 2/3 or nearly all of, our ring buffer Tx'd
- * but not yet cleaned up. Thus, most of the time,
- * we will not enable Successful-TxDone interrupts.
- */
- status = 0x9300;
- }
-
+
/* Fill in a Tx ring entry */
-
+
/* Mask to ring buffer boundary. */
entry = lp->cur_tx & TX_RING_MOD_MASK;
-
+
/* Caution: the write order is important here, set the status
- with the "ownership" bits last. */
+ * with the "ownership" bits last. */
lp->tx_ring[entry].length = le16_to_cpu(-skb->len);
lp->tx_ring[entry].misc = 0x00000000;
lp->tx_skbuff[entry] = skb;
- lp->tx_dma_addr[entry] = pci_map_single(lp->pci_dev, skb->data, skb->len, PCI_DMA_TODEVICE);
+ lp->tx_dma_addr[entry] = pci_map_single(lp->pci_dev, skb->data, skb->len,
+ PCI_DMA_TODEVICE);
lp->tx_ring[entry].base = (u32)le32_to_cpu(lp->tx_dma_addr[entry]);
wmb(); /* Make sure owner changes after all others are visible */
lp->tx_ring[entry].status = le16_to_cpu(status);
@@ -1469,16 +1722,17 @@
int must_restart;
if (!dev) {
- printk (KERN_DEBUG "%s(): irq %d for unknown device\n",
+ if (pcnet32_debug & NETIF_MSG_INTR)
+ printk (KERN_DEBUG "%s(): irq %d for unknown device\n",
__FUNCTION__, irq);
return;
}
ioaddr = dev->base_addr;
lp = dev->priv;
-
+
spin_lock(&lp->lock);
-
+
rap = lp->a.read_rap(ioaddr);
while ((csr0 = lp->a.read_csr (ioaddr, 0)) & 0x8600 && --boguscnt >= 0) {
if (csr0 == 0xffff) {
@@ -1503,7 +1757,7 @@
while (dirty_tx != lp->cur_tx) {
int entry = dirty_tx & TX_RING_MOD_MASK;
int status = (short)le16_to_cpu(lp->tx_ring[entry].status);
-
+
if (status < 0)
break; /* It still hasn't been Txed */
@@ -1513,6 +1767,9 @@
/* There was an major error, log it. */
int err_status = le32_to_cpu(lp->tx_ring[entry].misc);
lp->stats.tx_errors++;
+ if (netif_msg_tx_err(lp))
+ printk(KERN_ERR "%s: Tx error status=%04x err_status=%08x\n",
+ dev->name, status, err_status);
if (err_status & 0x04000000) lp->stats.tx_aborted_errors++;
if (err_status & 0x08000000) lp->stats.tx_carrier_errors++;
if (err_status & 0x10000000) lp->stats.tx_window_errors++;
@@ -1521,8 +1778,9 @@
lp->stats.tx_fifo_errors++;
/* Ackk! On FIFO errors the Tx unit is turned off! */
/* Remove this verbosity later! */
- printk(KERN_ERR "%s: Tx FIFO error! CSR0=%4.4x\n",
- dev->name, csr0);
+ if (netif_msg_tx_err(lp))
+ printk(KERN_ERR "%s: Tx FIFO error! CSR0=%4.4x\n",
+ dev->name, csr0);
must_restart = 1;
}
#else
@@ -1531,8 +1789,9 @@
if (! lp->dxsuflo) { /* If controller doesn't recover ... */
/* Ackk! On FIFO errors the Tx unit is turned off! */
/* Remove this verbosity later! */
- printk(KERN_ERR "%s: Tx FIFO error! CSR0=%4.4x\n",
- dev->name, csr0);
+ if (netif_msg_tx_err(lp))
+ printk(KERN_ERR "%s: Tx FIFO error! CSR0=%4.4x\n",
+ dev->name, csr0);
must_restart = 1;
}
}
@@ -1545,19 +1804,20 @@
/* We must free the original skb */
if (lp->tx_skbuff[entry]) {
- pci_unmap_single(lp->pci_dev, lp->tx_dma_addr[entry],
+ pci_unmap_single(lp->pci_dev, lp->tx_dma_addr[entry],
lp->tx_skbuff[entry]->len, PCI_DMA_TODEVICE);
dev_kfree_skb_irq(lp->tx_skbuff[entry]);
lp->tx_skbuff[entry] = 0;
- lp->tx_dma_addr[entry] = 0;
+ lp->tx_dma_addr[entry] = 0;
}
dirty_tx++;
}
delta = (lp->cur_tx - dirty_tx) & (TX_RING_MOD_MASK + TX_RING_SIZE);
- if (delta >= TX_RING_SIZE) {
- printk(KERN_ERR "%s: out-of-sync dirty pointer, %d vs. %d, full=%d.\n",
- dev->name, dirty_tx, lp->cur_tx, lp->tx_full);
+ if (delta > TX_RING_SIZE) {
+ if (netif_msg_drv(lp))
+ printk(KERN_ERR "%s: out-of-sync dirty pointer, %d vs. %d, full=%d.\n",
+ dev->name, dirty_tx, lp->cur_tx, lp->tx_full);
dirty_tx += TX_RING_SIZE;
delta -= TX_RING_SIZE;
}
@@ -1578,18 +1838,20 @@
/*
* this happens when our receive ring is full. This shouldn't
* be a problem as we will see normal rx interrupts for the frames
- * in the receive ring. But there are some PCI chipsets (I can reproduce
- * this on SP3G with Intel saturn chipset) which have sometimes problems
- * and will fill up the receive ring with error descriptors. In this
- * situation we don't get a rx interrupt, but a missed frame interrupt sooner
- * or later. So we try to clean up our receive ring here.
+ * in the receive ring. But there are some PCI chipsets (I can
+ * reproduce this on SP3G with Intel saturn chipset) which have
+ * sometimes problems and will fill up the receive ring with
+ * error descriptors. In this situation we don't get a rx
+ * interrupt, but a missed frame interrupt sooner or later.
+ * So we try to clean up our receive ring here.
*/
pcnet32_rx(dev);
lp->stats.rx_errors++; /* Missed a Rx frame. */
}
if (csr0 & 0x0800) {
- printk(KERN_ERR "%s: Bus master arbitration failure, status %4.4x.\n",
- dev->name, csr0);
+ if (netif_msg_drv(lp))
+ printk(KERN_ERR "%s: Bus master arbitration failure, status %4.4x.\n",
+ dev->name, csr0);
/* unlike for the lance, there is no restart needed */
}
@@ -1597,16 +1859,17 @@
/* stop the chip to clear the error condition, then restart */
lp->a.write_csr (ioaddr, 0, 0x0004);
pcnet32_restart(dev, 0x0002);
+ netif_wake_queue(dev);
}
}
/* Clear any other interrupt, and set interrupt enable. */
lp->a.write_csr (ioaddr, 0, 0x7940);
lp->a.write_rap (ioaddr,rap);
-
+
if (netif_msg_intr(lp))
printk(KERN_DEBUG "%s: exiting interrupt, csr0=%#4.4x.\n",
- dev->name, lp->a.read_csr (ioaddr, 0));
+ dev->name, lp->a.read_csr (ioaddr, 0));
spin_unlock(&lp->lock);
}
@@ -1616,13 +1879,14 @@
{
struct pcnet32_private *lp = dev->priv;
int entry = lp->cur_rx & RX_RING_MOD_MASK;
+ int boguscnt = RX_RING_SIZE / 2;
/* If we own the next entry, it's a new packet. Send it up. */
while ((short)le16_to_cpu(lp->rx_ring[entry].status) >= 0) {
int status = (short)le16_to_cpu(lp->rx_ring[entry].status) >> 8;
if (status != 0x03) { /* There was an error. */
- /*
+ /*
* There is a tricky error noted by John Murphy,
* <murf@perftech.com> to Russ Nelson: Even with full-sized
* buffers it's possible for a jabber packet to use two
@@ -1639,17 +1903,18 @@
/* Malloc up new buffer, compatible with net-2e. */
short pkt_len = (le32_to_cpu(lp->rx_ring[entry].msg_length) & 0xfff)-4;
struct sk_buff *skb;
-
- if(pkt_len < 60) {
- printk(KERN_ERR "%s: Runt packet!\n",dev->name);
+
+ if (pkt_len < 60) {
+ if (netif_msg_rx_err(lp))
+ printk(KERN_ERR "%s: Runt packet!\n", dev->name);
lp->stats.rx_errors++;
} else {
int rx_in_place = 0;
if (pkt_len > rx_copybreak) {
struct sk_buff *newskb;
-
- if ((newskb = dev_alloc_skb (PKT_BUF_SZ))) {
+
+ if ((newskb = dev_alloc_skb(PKT_BUF_SZ))) {
skb_reserve (newskb, 2);
skb = lp->rx_skbuff[entry];
pci_unmap_single(lp->pci_dev, lp->rx_dma_addr[entry],
@@ -1657,27 +1922,31 @@
skb_put (skb, pkt_len);
lp->rx_skbuff[entry] = newskb;
newskb->dev = dev;
- lp->rx_dma_addr[entry] =
- pci_map_single(lp->pci_dev, newskb->tail,
- PKT_BUF_SZ-2, PCI_DMA_FROMDEVICE);
+ lp->rx_dma_addr[entry] =
+ pci_map_single(lp->pci_dev, newskb->tail,
+ PKT_BUF_SZ-2, PCI_DMA_FROMDEVICE);
lp->rx_ring[entry].base = le32_to_cpu(lp->rx_dma_addr[entry]);
rx_in_place = 1;
} else
skb = NULL;
} else {
skb = dev_alloc_skb(pkt_len+2);
- }
-
+ }
+
if (skb == NULL) {
- int i;
- printk(KERN_ERR "%s: Memory squeeze, deferring packet.\n", dev->name);
+ int i;
+ if (netif_msg_drv(lp))
+ printk(KERN_ERR "%s: Memory squeeze, deferring packet.\n",
+ dev->name);
for (i = 0; i < RX_RING_SIZE; i++)
- if ((short)le16_to_cpu(lp->rx_ring[(entry+i) & RX_RING_MOD_MASK].status) < 0)
+ if ((short)le16_to_cpu(lp->rx_ring[(entry+i)
+ & RX_RING_MOD_MASK].status) < 0)
break;
if (i > RX_RING_SIZE -2) {
lp->stats.rx_dropped++;
lp->rx_ring[entry].status |= le16_to_cpu(0x8000);
+ wmb(); /* Make sure adapter sees owner change */
lp->cur_rx++;
}
break;
@@ -1691,8 +1960,8 @@
PKT_BUF_SZ-2,
PCI_DMA_FROMDEVICE);
eth_copy_and_sum(skb,
- (unsigned char *)(lp->rx_skbuff[entry]->tail),
- pkt_len,0);
+ (unsigned char *)(lp->rx_skbuff[entry]->tail),
+ pkt_len,0);
}
lp->stats.rx_bytes += skb->len;
skb->protocol=eth_type_trans(skb,dev);
@@ -1709,6 +1978,7 @@
wmb(); /* Make sure owner changes after all others are visible */
lp->rx_ring[entry].status |= le16_to_cpu(0x8000);
entry = (++lp->cur_rx) & RX_RING_MOD_MASK;
+ if (--boguscnt <= 0) break; /* don't stay in loop forever */
}
return 0;
@@ -1720,9 +1990,14 @@
unsigned long ioaddr = dev->base_addr;
struct pcnet32_private *lp = dev->priv;
int i;
+ unsigned long flags;
+
+ del_timer_sync(&lp->watchdog_timer);
netif_stop_queue(dev);
+ spin_lock_irqsave(&lp->lock, flags);
+
lp->stats.rx_missed_errors = lp->a.read_csr (ioaddr, 112);
if (netif_msg_ifdown(lp))
@@ -1733,35 +2008,43 @@
lp->a.write_csr (ioaddr, 0, 0x0004);
/*
- * Switch back to 16bit mode to avoid problems with dumb
+ * Switch back to 16bit mode to avoid problems with dumb
* DOS packet driver after a warm reboot
*/
lp->a.write_bcr (ioaddr, 20, 4);
+ spin_unlock_irqrestore(&lp->lock, flags);
+
free_irq(dev->irq, dev);
-
+
+ spin_lock_irqsave(&lp->lock, flags);
+
/* free all allocated skbuffs */
for (i = 0; i < RX_RING_SIZE; i++) {
- lp->rx_ring[i].status = 0;
+ lp->rx_ring[i].status = 0;
+ wmb(); /* Make sure adapter sees owner change */
if (lp->rx_skbuff[i]) {
- pci_unmap_single(lp->pci_dev, lp->rx_dma_addr[i], PKT_BUF_SZ-2,
+ pci_unmap_single(lp->pci_dev, lp->rx_dma_addr[i], PKT_BUF_SZ-2,
PCI_DMA_FROMDEVICE);
dev_kfree_skb(lp->rx_skbuff[i]);
}
lp->rx_skbuff[i] = NULL;
- lp->rx_dma_addr[i] = 0;
+ lp->rx_dma_addr[i] = 0;
}
-
+
for (i = 0; i < TX_RING_SIZE; i++) {
+ lp->tx_ring[i].status = 0; /* CPU owns buffer */
+ wmb(); /* Make sure adapter sees owner change */
if (lp->tx_skbuff[i]) {
- pci_unmap_single(lp->pci_dev, lp->tx_dma_addr[i], lp->tx_skbuff[i]->len, PCI_DMA_TODEVICE);
+ pci_unmap_single(lp->pci_dev, lp->tx_dma_addr[i],
+ lp->tx_skbuff[i]->len, PCI_DMA_TODEVICE);
dev_kfree_skb(lp->tx_skbuff[i]);
- }
+ }
lp->tx_skbuff[i] = NULL;
- lp->tx_dma_addr[i] = 0;
+ lp->tx_dma_addr[i] = 0;
}
-
- MOD_DEC_USE_COUNT;
+
+ spin_unlock_irqrestore(&lp->lock, flags);
return 0;
}
@@ -1793,9 +2076,9 @@
char *addrs;
int i;
u32 crc;
-
+
/* set all multicast bits */
- if (dev->flags & IFF_ALLMULTI){
+ if (dev->flags & IFF_ALLMULTI) {
ib->filter[0] = 0xffffffff;
ib->filter[1] = 0xffffffff;
return;
@@ -1805,19 +2088,18 @@
ib->filter[1] = 0;
/* Add addresses */
- for (i = 0; i < dev->mc_count; i++){
+ for (i = 0; i < dev->mc_count; i++) {
addrs = dmi->dmi_addr;
dmi = dmi->next;
-
+
/* multicast address? */
if (!(*addrs & 1))
continue;
-
+
crc = ether_crc_le(6, addrs);
crc = crc >> 26;
mcast_table [crc >> 4] = le16_to_cpu(
- le16_to_cpu(mcast_table [crc >> 4]) | (1 << (crc & 0xf))
- );
+ le16_to_cpu(mcast_table [crc >> 4]) | (1 << (crc & 0xf)));
}
return;
}
@@ -1829,62 +2111,58 @@
static void pcnet32_set_multicast_list(struct net_device *dev)
{
unsigned long ioaddr = dev->base_addr, flags;
- struct pcnet32_private *lp = dev->priv;
+ struct pcnet32_private *lp = dev->priv;
spin_lock_irqsave(&lp->lock, flags);
if (dev->flags&IFF_PROMISC) {
/* Log any net taps. */
- printk(KERN_INFO "%s: Promiscuous mode enabled.\n", dev->name);
+ if (netif_msg_hw(lp))
+ printk(KERN_INFO "%s: Promiscuous mode enabled.\n", dev->name);
lp->init_block.mode = le16_to_cpu(0x8000 | (lp->options & PCNET32_PORT_PORTSEL) << 7);
} else {
lp->init_block.mode = le16_to_cpu((lp->options & PCNET32_PORT_PORTSEL) << 7);
pcnet32_load_multicast (dev);
}
-
- lp->a.write_csr (ioaddr, 0, 0x0004); /* Temporarily stop the lance. */
+ lp->a.write_csr (ioaddr, 0, 0x0004); /* Temporarily stop the lance. */
pcnet32_restart(dev, 0x0042); /* Resume normal operation */
+ netif_wake_queue(dev);
+
spin_unlock_irqrestore(&lp->lock, flags);
}
+/* This routine assumes that the lp->lock is held */
static int mdio_read(struct net_device *dev, int phy_id, int reg_num)
{
- struct pcnet32_private *lp = dev->priv;
- unsigned long ioaddr = dev->base_addr;
- u16 val_out;
- int phyaddr;
-
- if (!lp->mii)
- return 0;
-
- phyaddr = lp->a.read_bcr(ioaddr, 33);
-
- lp->a.write_bcr(ioaddr, 33, ((phy_id & 0x1f) << 5) | (reg_num & 0x1f));
- val_out = lp->a.read_bcr(ioaddr, 34);
- lp->a.write_bcr(ioaddr, 33, phyaddr);
-
- return val_out;
+ struct pcnet32_private *lp = dev->priv;
+ unsigned long ioaddr = dev->base_addr;
+ u16 val_out;
+
+ if (!lp->mii)
+ return 0;
+
+ lp->a.write_bcr(ioaddr, 33, ((phy_id & 0x1f) << 5) | (reg_num & 0x1f));
+ val_out = lp->a.read_bcr(ioaddr, 34);
+
+ return val_out;
}
+/* This routine assumes that the lp->lock is held */
static void mdio_write(struct net_device *dev, int phy_id, int reg_num, int val)
{
- struct pcnet32_private *lp = dev->priv;
- unsigned long ioaddr = dev->base_addr;
- int phyaddr;
+ struct pcnet32_private *lp = dev->priv;
+ unsigned long ioaddr = dev->base_addr;
+
+ if (!lp->mii)
+ return;
- if (!lp->mii)
- return;
-
- phyaddr = lp->a.read_bcr(ioaddr, 33);
-
- lp->a.write_bcr(ioaddr, 33, ((phy_id & 0x1f) << 5) | (reg_num & 0x1f));
- lp->a.write_bcr(ioaddr, 34, val);
- lp->a.write_bcr(ioaddr, 33, phyaddr);
+ lp->a.write_bcr(ioaddr, 33, ((phy_id & 0x1f) << 5) | (reg_num & 0x1f));
+ lp->a.write_bcr(ioaddr, 34, val);
}
static int pcnet32_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
{
- struct pcnet32_private *lp = dev->priv;
+ struct pcnet32_private *lp = dev->priv;
struct mii_ioctl_data *data = (struct mii_ioctl_data *)&rq->ifr_data;
int rc;
unsigned long flags;
@@ -1901,6 +2179,21 @@
return rc;
}
+static void pcnet32_watchdog(struct net_device *dev)
+{
+ struct pcnet32_private *lp = dev->priv;
+ unsigned long flags;
+
+ /* Print the link status if it has changed */
+ if (lp->mii) {
+ spin_lock_irqsave(&lp->lock, flags);
+ mii_check_media (&lp->mii_if, netif_msg_link(lp), 0);
+ spin_unlock_irqrestore(&lp->lock, flags);
+ }
+
+ mod_timer (&(lp->watchdog_timer), PCNET32_WATCHDOG_TIMEOUT);
+}
+
static void __devexit pcnet32_remove_one(struct pci_dev *pdev)
{
struct net_device *dev = pci_get_drvdata(pdev);
@@ -1926,15 +2219,15 @@
MODULE_PARM(debug, "i");
MODULE_PARM_DESC(debug, DRV_NAME " debug level");
MODULE_PARM(max_interrupt_work, "i");
-MODULE_PARM_DESC(max_interrupt_work, DRV_NAME " maximum events handled per interrupt");
+MODULE_PARM_DESC(max_interrupt_work, DRV_NAME " maximum events handled per interrupt");
MODULE_PARM(rx_copybreak, "i");
-MODULE_PARM_DESC(rx_copybreak, DRV_NAME " copy breakpoint for copy-only-tiny-frames");
+MODULE_PARM_DESC(rx_copybreak, DRV_NAME " copy breakpoint for copy-only-tiny-frames");
MODULE_PARM(tx_start_pt, "i");
-MODULE_PARM_DESC(tx_start_pt, DRV_NAME " transmit start point (0-3)");
+MODULE_PARM_DESC(tx_start_pt, DRV_NAME " transmit start point (0-3)");
MODULE_PARM(pcnet32vlb, "i");
-MODULE_PARM_DESC(pcnet32vlb, DRV_NAME " Vesa local bus (VLB) support (0/1)");
+MODULE_PARM_DESC(pcnet32vlb, DRV_NAME " Vesa local bus (VLB) support (0/1)");
MODULE_PARM(options, "1-" __MODULE_STRING(MAX_UNITS) "i");
-MODULE_PARM_DESC(options, DRV_NAME " initial option setting(s) (0-15)");
+MODULE_PARM_DESC(options, DRV_NAME " initial option setting(s) (0-15)");
MODULE_PARM(full_duplex, "1-" __MODULE_STRING(MAX_UNITS) "i");
MODULE_PARM_DESC(full_duplex, DRV_NAME " full duplex setting(s) (1)");
@@ -1942,6 +2235,8 @@
MODULE_DESCRIPTION("Driver for PCnet32 and PCnetPCI based ethercards");
MODULE_LICENSE("GPL");
+#define PCNET32_MSG_DEFAULT (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_LINK)
+
/* An additional parameter that may be passed in... */
static int debug = -1;
static int tx_start_pt = -1;
@@ -1951,8 +2246,7 @@
{
printk(KERN_INFO "%s", version);
- if (debug >= 0 && debug < (sizeof(int) - 1))
- pcnet32_debug = 1 << debug;
+ pcnet32_debug = netif_msg_init(debug, PCNET32_MSG_DEFAULT);
if ((tx_start_pt >= 0) && (tx_start_pt <= 3))
tx_start = tx_start_pt;
@@ -1965,9 +2259,9 @@
if (pcnet32vlb)
pcnet32_probe_vlbus();
- if (cards_found)
+ if (cards_found && (pcnet32_debug & NETIF_MSG_PROBE))
printk(KERN_INFO PFX "%d cards_found.\n", cards_found);
-
+
return (pcnet32_have_pci + cards_found) ? 0 : -ENODEV;
}
@@ -1975,7 +2269,6 @@
{
struct net_device *next_dev;
- /* No need to check MOD_IN_USE, as sys_delete_module() checks. */
while (pcnet32_dev) {
struct pcnet32_private *lp = pcnet32_dev->priv;
next_dev = lp->next;
@@ -1985,6 +2278,7 @@
free_netdev(pcnet32_dev);
pcnet32_dev = next_dev;
}
+
if (pcnet32_have_pci)
pci_unregister_driver(&pcnet32_driver);
}
@@ -1994,7 +2288,6 @@
/*
* Local variables:
- * compile-command: "gcc -D__KERNEL__ -I/usr/src/linux/net/inet -Wall -Wstrict-prototypes -O6 -m486 -c pcnet32.c"
* c-indent-level: 4
* tab-width: 8
* End:
FUNET's LINUX-ADM group, linux-adm@nic.funet.fi
TCL-scripts by Sam Shen (who was at: slshen@lbl.gov)