patch-2.4.7 linux/arch/i386/kernel/setup.c

• Lines: 138
• Date: Wed Jul 11 09:31:44 2001
• Orig file: v2.4.6/linux/arch/i386/kernel/setup.c
• Orig date: Fri May 25 17:07:09 2001

diff -u --recursive --new-file v2.4.6/linux/arch/i386/kernel/setup.c linux/arch/i386/kernel/setup.c
@@ -1123,7 +1123,6 @@
 static int __init init_amd(struct cpuinfo_x86 *c)
 {
 	u32 l, h;
-	unsigned long flags;
 	int mbytes = max_mapnr >> (20-PAGE_SHIFT);
 	int r;
 
@@ -1187,14 +1186,13 @@
 					mbytes=508;
 					
 				rdmsr(0xC0000082, l, h);
-				if((l&0x0000FFFF)==0)
-				{		
+				if ((l&0x0000FFFF)==0) {
+					unsigned long flags;
 					l=(1<<0)|((mbytes/4)<<1);
-					save_flags(flags);
-					__cli();
+					local_irq_save(flags);
 					__asm__ __volatile__ ("wbinvd": : :"memory");
 					wrmsr(0xC0000082, l, h);
-					restore_flags(flags);
+					local_irq_restore(flags);
 					printk(KERN_INFO "Enabling old style K6 write allocation for %d Mb\n",
 						mbytes);
 					
@@ -1209,14 +1207,13 @@
 					mbytes=4092;
 
 				rdmsr(0xC0000082, l, h);
-				if((l&0xFFFF0000)==0)
-				{
+				if ((l&0xFFFF0000)==0) {
+					unsigned long flags;
 					l=((mbytes>>2)<<22)|(1<<16);
-					save_flags(flags);
-					__cli();
+					local_irq_save(flags);
 					__asm__ __volatile__ ("wbinvd": : :"memory");
 					wrmsr(0xC0000082, l, h);
-					restore_flags(flags);
+					local_irq_restore(flags);
 					printk(KERN_INFO "Enabling new style K6 write allocation for %d Mb\n",
 						mbytes);
 				}
@@ -1243,12 +1240,13 @@
 /*
  * Read Cyrix DEVID registers (DIR) to get more detailed info. about the CPU
  */
-static inline void do_cyrix_devid(unsigned char *dir0, unsigned char *dir1)
+static void do_cyrix_devid(unsigned char *dir0, unsigned char *dir1)
 {
 	unsigned char ccr2, ccr3;
+	unsigned long flags;
 
 	/* we test for DEVID by checking whether CCR3 is writable */
-	cli();
+	local_irq_save(flags);
 	ccr3 = getCx86(CX86_CCR3);
 	setCx86(CX86_CCR3, ccr3 ^ 0x80);
 	getCx86(0xc0);   /* dummy to change bus */
@@ -1272,7 +1270,7 @@
 		*dir0 = getCx86(CX86_DIR0);
 		*dir1 = getCx86(CX86_DIR1);
 	}
-	sti();
+	local_irq_restore(flags);
 }
 
 /*
@@ -1316,15 +1314,16 @@
 {
 	if (Cx86_dir0_msb == 3) {
 		unsigned char ccr3, ccr5;
+		unsigned long flags;
 
-		cli();
+		local_irq_save(flags);
 		ccr3 = getCx86(CX86_CCR3);
 		setCx86(CX86_CCR3, (ccr3 & 0x0f) | 0x10); /* enable MAPEN  */
 		ccr5 = getCx86(CX86_CCR5);
 		if (ccr5 & 2)
 			setCx86(CX86_CCR5, ccr5 & 0xfd);  /* reset SLOP */
 		setCx86(CX86_CCR3, ccr3);                 /* disable MAPEN */
-		sti();
+		local_irq_restore(flags);
 
 		if (ccr5 & 2) { /* possible wrong calibration done */
 			printk(KERN_INFO "Recalibrating delay loop with SLOP bit reset\n");
@@ -1438,8 +1437,16 @@
 		break;
 
         case 5: /* 6x86MX/M II */
-		if (dir1 > 7) dir0_msn++;  /* M II */
-		else c->coma_bug = 1;      /* 6x86MX, it has the bug. */
+		if (dir1 > 7)
+		{
+			dir0_msn++;  /* M II */
+			/* Enable MMX extensions (App note 108) */
+			setCx86(CX86_CCR7, getCx86(CX86_CCR7)|1);
+		}
+		else
+		{
+			c->coma_bug = 1;      /* 6x86MX, it has the bug. */
+		}
 		tmp = (!(dir0_lsn & 7) || dir0_lsn & 1) ? 2 : 0;
 		Cx86_cb[tmp] = cyrix_model_mult2[dir0_lsn & 7];
 		p = Cx86_cb+tmp;
@@ -1987,6 +1994,9 @@
 		wrmsr(0x119,lo,hi);
 		printk(KERN_NOTICE "CPU serial number disabled.\n");
 		clear_bit(X86_FEATURE_PN, &c->x86_capability);
+
+		/* Disabling the serial number may affect the cpuid level */
+		c->cpuid_level = cpuid_eax(0);
 	}
 }
 
@@ -2092,15 +2102,16 @@
    	        if (dir0 == 5 || dir0 == 3)
    	        {
 			unsigned char ccr3, ccr4;
+			unsigned long flags;
 
 			printk(KERN_INFO "Enabling CPUID on Cyrix processor.\n");
-			cli();
+			local_irq_save(flags);
 			ccr3 = getCx86(CX86_CCR3);
 			setCx86(CX86_CCR3, (ccr3 & 0x0f) | 0x10); /* enable MAPEN  */
 			ccr4 = getCx86(CX86_CCR4);
 			setCx86(CX86_CCR4, ccr4 | 0x80);          /* enable cpuid  */
 			setCx86(CX86_CCR3, ccr3);                 /* disable MAPEN */
-			sti();
+			local_irq_restore(flags);
 		}
 	} else