patch-2.3.23 linux/include/asm-arm/proc-armo/assembler.h

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diff -u --recursive --new-file v2.3.22/linux/include/asm-arm/proc-armo/assembler.h linux/include/asm-arm/proc-armo/assembler.h
@@ -6,54 +6,30 @@
  * This file contains arm architecture specific defines
  * for the different processors
  */
+#ifndef __ASSEMBLY__
+#error "Only include this from assembly code"
+#endif
 
-/*
- * LOADREGS: multiple register load (ldm) with pc in register list
- *		(takes account of ARM6 not using ^)
- *
- * RETINSTR: return instruction: adds the 's' in at the end of the
- *		instruction if this is not an ARM6
- *
- * SAVEIRQS: save IRQ state (not required on ARM2/ARM3 - done
- *		implicitly
- *
- * RESTOREIRQS: restore IRQ state (not required on ARM2/ARM3 - done
- *		implicitly with ldm ... ^ or movs.
- *
- * These next two need thinking about - can't easily use stack... (see system.S)
- * DISABLEIRQS: disable IRQS in SVC mode
- *
- * ENABLEIRQS: enable IRQS in SVC mode
- *
- * USERMODE: switch to USER mode
- *
- * SVCMODE: switch to SVC mode
- */
-
-#define N_BIT	(1 << 31)
-#define Z_BIT	(1 << 30)
-#define C_BIT	(1 << 29)
-#define V_BIT	(1 << 28)
-
-#define PCMASK	0xfc000003
-
-#ifdef __ASSEMBLER__
-
-#define I_BIT	(1 << 27)
-#define F_BIT	(1 << 26)
-
-#define MODE_USR	0
-#define MODE_FIQ	1
-#define MODE_IRQ	2
-#define MODE_SVC	3
+#define MODE_USR	USR26_MODE
+#define MODE_FIQ	FIQ26_MODE
+#define MODE_IRQ	IRQ26_MODE
+#define MODE_SVC	SVC26_MODE
 
 #define DEFAULT_FIQ	MODE_FIQ
 
+#ifdef __STDC__
 #define LOADREGS(cond, base, reglist...)\
 	ldm##cond	base,reglist^
 
 #define RETINSTR(instr, regs...)\
 	instr##s	regs
+#else
+#define LOADREGS(cond, base, reglist...)\
+	ldm/**/cond	base,reglist^
+
+#define RETINSTR(instr, regs...)\
+	instr/**/s	regs
+#endif
 
 #define MODENOP\
 	mov	r0, r0
@@ -84,5 +60,3 @@
 #define SVCMODE(tmpreg)\
 	teqp	pc, $0x00000003;\
 	mov	r0, r0
-
-#endif

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